Peripheral Memory Mapped Registers
Table 4-23 Serial Communication Interface 0 Registers Address Map
(SCI0_BASE = $00 F280)
Register Acronym
Address Offset
$0
Register Description
Baud Rate Register
SCI0_SCIBR
SCI0_SCICR
$1
Control Register
Reserved
SCI0_SCISR
SCI0_SCIDR
$3
$4
Status Register
Data Register
Table 4-24 Serial Communication Interface 1 Registers Address Map
(SCI1_BASE = $00 F290)
Register Acronym
Address Offset
Register Description
Baud Rate Register
SCI1_SCIBR
SCI1_SCICR
$0
$1
Control Register
Reserved
SCI1_SCISR
SCI1_SCIDR
$3
$4
Status Register
Data Register
Table 4-25 Serial Peripheral Interface 0 Registers Address Map
(SPI0_BASE = $00 F2A0)
Register Acronym
Address Offset
Register Description
Status and Control Register
SPI0_SPSCR
SPI0_SPDSR
SPI0_SPDRR
SPI0_SPDTR
$0
$1
$2
$3
Data Size Register
Data Receive Register
Data Transmitter Register
Table 4-26 Serial Peripheral Interface 1 Registers Address Map
(SPI1_BASE = $00 F2B0)
Register Acronym
Address Offset
Register Description
Status and Control Register
SPI1_SPSCR
SPI1_SPDSR
SPI1_SPDRR
SPI1_SPDTR
$0
$1
$2
$3
Data Size Register
Data Receive Register
Data Transmitter Register
56F8367 Technical Data, Rev. 9
Freescale Semiconductor
Preliminary
65
FREESCALE [ Freescale ]
