Table 4-21 Analog-to-Digital Converter Registers Address Map (Continued)
(ADCB_BASE = $00 F240)
Register Acronym
Address Offset
Register Description
Low Limit Register 1
ADCB_LLMT 1
ADCB_LLMT 2
ADCB_LLMT 3
ADCB_LLMT 4
ADCB_LLMT 5
ADCB_LLMT 6
ADCB_LLMT 7
ADCB_HLMT 0
ADCB_HLMT 1
ADCB_HLMT 2
ADCB_HLMT 3
ADCB_HLMT 4
ADCB_HLMT 5
ADCB_HLMT 6
ADCB_HLMT 7
ADCB_OFS 0
ADCB_OFS 1
ADCB_OFS 2
ADCB_OFS 3
ADCB_OFS 4
ADCB_OFS 5
ADCB_OFS 6
ADCB_OFS 7
ADCB_POWER
ADCB_CAL
$12
$13
$14
$15
$16
$17
$18
$19
$1A
$1B
$1C
$1D
$1E
$1F
$20
$21
$22
$23
$24
$25
$26
$27
$28
$29
$2A
Low Limit Register 2
Low Limit Register 3
Low Limit Register 4
Low Limit Register 5
Low Limit Register 6
Low Limit Register 7
High Limit Register 0
High Limit Register 1
High Limit Register 2
High Limit Register 3
High Limit Register 4
High Limit Register 5
High Limit Register 6
High Limit Register 7
Offset Register 0
Offset Register 1
Offset Register 2
Offset Register 3
Offset Register 4
Offset Register 5
Offset Register 6
Offset Register 7
Power Control Register
ADC Calibration Register
Table 4-22 Temperature Sensor Register Address Map
(TSENSOR_BASE = $00 F270)
Temperature Sensor is NOT available in the 56F8167 device
Register Acronym
Address Offset
Register Description
TSENSOR_CNTL
$0
Control Register
56F8367 Technical Data, Rev. 9
64
Freescale Semiconductor
Preliminary
FREESCALE [ Freescale ]
