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56F8367_09 参数 Datasheet PDF下载

56F8367_09图片预览
型号: 56F8367_09
PDF下载: 下载PDF文件 查看货源
内容描述: 16位数字信号控制器 [16-bit Digital Signal Controllers]
分类和应用: 控制器
文件页数/大小: 182 页 / 1852 K
品牌: FREESCALE [ Freescale ]
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6.5.6.3  
CAN—Bit 13  
This bit controls the pull-up resistors on the CAN_RX pin.  
6.5.6.4  
EMI_MODE—Bit 12  
This bit controls the pull-up resistors on the EMI_MODE pin.  
6.5.6.5  
RESET—Bit 11  
This bit controls the pull-up resistors on the RESET pin.  
6.5.6.6  
IRQ—Bit 10  
This bit controls the pull-up resistors on the IRQA and IRQB pins.  
6.5.6.7  
XBOOT—Bit 9  
This bit controls the pull-up resistors on the EXTBOOT pin.  
Note:  
In this package, this input pin is double-bonded with the adjacent VSS pin and this bit should be  
changed to a 1 in order to reduce power consumption.  
6.5.6.8  
PWMB—Bit 8  
This bit controls the pull-up resistors on the FAULTB0, FAULTB1, FAULTB2, and FAULTB3 pins.  
6.5.6.9 PWMA0—Bit 7  
This bit controls the pull-up resistors on the FAULTA0, FAULTA1, and FAULTA2 pins.  
6.5.6.10 Reserved—Bit 6  
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.  
6.5.6.11 CTRL—Bit 5  
This bit controls the pull-up resistors on the WR and RD pins.  
6.5.6.12 Reserved—Bit 4  
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.  
6.5.6.13 JTAG—Bit 3  
This bit controls the pull-up resistors on the TRST, TMS and TDI pins.  
6.5.6.14 Reserved—Bit 2–0  
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.  
6.5.7  
CLKO Select Register (SIM_CLKOSR)  
The CLKO select register can be used to multiplex out any one of the clocks generated inside the clock  
generation and SIM modules. The default value is SYS_CLK. All other clocks primarily muxed out are  
for test purposes only, and are subject to significant phase shift at high frequencies.  
56F8367 Technical Data, Rev. 9  
118  
Freescale Semiconductor  
Preliminary  
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