Add.
Offset
Register Acronym
GPIOA_PUPEN
15
0
14
0
13
0
12
0
11
10
9
8
7
6
5
4
3
2
1
0
R
W
PU[15:0]
$0
$1
$2
$3
$4
$5
$6
RS
0
1
1
1
1
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
1
1
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
R
W
.0
.0
.0
.0
D[15:0]
GPIOA_DATA
GPIOA_DDIR
GPIOA_PEREN
GPIOA_IASSRT
GPIOA_IEN
RS
0
0
0
0
0
0
0
0
0
0
0
R
W
.0. .0. .0. .0.
DD[15:0]
RS
0
0
0
0
0
0
0
0
0
0
R
W
PE[15:0]
RS
0
0
0
0
0
0
0
R
W
0
0
0
0
0
0
0
0
0
IA[15:0]
RS
0
0
0
0
R
W
0
0
0
IEN[15:0]
RS
0
0
0
0
0
0
0
0
0
0
R
W
IEPOL[15:0]
GPIOA_IEPOL
RS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R
W
IPR[15:0]
$7
$8
$9
$A
$B
GPIOA_IPEND
GPIOA_IEDGE
GPIOA_PPOUTM
GPIOA_RDATA
GPIOA_DRIVE
RS
0
0
0
0
0
0
0
0
0
0
1
X
0
0
0
1
X
0
0
0
1
X
0
0
0
1
X
0
0
0
1
0
0
0
0
1
0
0
1
X
0
0
0
1
X
0
0
0
1
X
0
0
0
1
X
0
R
W
IES[15:0]
RS
0
0
0
0
0
0
0
0
0
0
R
W
OEN[15:0]
RS
0
0
1
0
1
0
1
0
1
1
R
W
RAW DATA[15:0]
RS
0
0
X
0
X
0
X
0
X
X
X
X
R
W
DRIVE[15:0]
RS
0
0
0
0
0
0
0
0
0
R
W
Read as 0
Reserved
Reset
RS
Figure 8-1 GPIOA Register Map Summary
56F8036 Data Sheet, Rev. 6
118
FreescaleSemiconductor