Table 2-3 56F8014 Signal and Package Information for the 32-Pin LQFP (Continued)
Signal
Name
LQFP
Pin No.
StateDuring
Reset
Type
Signal Description
GPIOB5
3
Input/
Output
Port B GPIO — This GPIO pin can be individually programmed as
Output
disabled, an input or output pin.
internal
pull-up
(T1)
Input/
Output
enabled,
pin is in input
mode
T1 — Timer, Channel 1
(FAULT3)
Output
Input
FAULT3 — This fault input pin is used for disabling selected PWM
outputs in cases where fault conditions originate off-chip.
After reset, the default state is GPIOB5. The peripheral functionality
is controlled via the SIM. See Section 6.3.8.
TCK
15
Output
Test Clock Input — This input pin provides a gated clock to
disabled, synchronize the test logic and shift serial data to the JTAG/EOnCE
internal
pull-up
port. The pin is connected internally to a pull-up resistor. A Schmitt
trigger input is used for noise immunity.
enabled,
(GPIOD2)
Input/
pin is in input Port D GPIO — This GPIO pin can be individually programmed as
Output
mode
an input or output pin.
After reset, the default state is TCK.
TMS
30
Input
Output
Test Mode Select Input — This input pin is used to sequence the
disabled, JTAG TAP controller’s state machine. It is sampled on the rising
internal
pull-up
edge of TCK and has an on-chip pull-up resistor.
(GPIOD3)
Input/
enabled,
Port D GPIO — This GPIO pin can be individually programmed as
Output
pin is in input an input or output pin.
mode
After reset, the default state is TMS.
Note: Always tie the TMS pin to VDD through a 2.2K resistor.
TDI
29
Input
Output
Test Data Input — This input pin provides a serial input data stream
disabled, to the JTAG/EOnCE port. It is sampled on the rising edge of TCK
internal
pull-up
and has an on-chip pull-up resistor.
(GPIOD0)
Input/
enabled,
Port D GPIO — This GPIO pin can be individually programmed as
Output
pin is in input an input or output pin.
mode
After reset, the default state is TDI.
Return to Table 2-2
56F8014 Technical Data, Rev. 9
20
Freescale Semiconductor
Preliminary