ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 4. Dynamic Electrical Characteristics (continued)
Characteristics noted under conditions 5.5V ≤ VSUP ≤ 18V, -40°C ≤ TA ≤ 125°C for the 33912 and -40°C ≤ TA ≤ 85°C for the
34912, unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25°C under nominal
conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
L1, L2, L3 AND L4 INPUTS
Wake-up Filter Time
t
8.0
20
38
µs
WUF
STATE MACHINE TIMING
Delay Between CS LOW-to-HIGH Transition (at End of SPI Stop Command)
and Stop Mode Activation(44)
tSTOP
µs
–
–
5.0
Normal Request Mode Timeout (see Figure 12, page 20)
t
110
150
205
ms
NRTOUT
Delay Between SPI Command and HS/LS Turn On(45)
9V < VSUP < 27V
tS-
µs
ON
–
–
–
–
–
–
10
10
10
Delay Between SPI Command and HS/LS Turn Off(45)
9V < VSUP < 27V
tS-OFF
µs
Delay Between Normal Request and Normal Mode After a Watchdog Trigger
Command (Normal Request Mode)(44)
tSNR2N
µs
µs
Delay Between CS Wake-Up (CS LOW to HIGH) in Stop Mode and:
Normal Request Mode, VDD ON and RST HIGH
First Accepted SPI Command
tWUCS
tWUSPI
9.0
90
15
—
80
N/A
Minimum Time Between Rising and Falling Edge on the CS
t2CS
4.0
—
—
µs
LIN PHYSICAL LAYER: DRIVER CHARACTERISTICS FOR NORMAL SLEW RATE - 20.0KBIT/SEC(46), (47)
Duty Cycle 1: D1 = tBUS_REC(MIN)/(2 x tBIT), tBIT = 50µs
D1
7.0V ≤ VSUP ≤ 18V
0.396
—
—
—
Duty Cycle 2: D2 = tBUS_REC(MAX)/(2 x tBIT), tBIT = 50µs
D2
7.6V ≤ VSUP ≤ 18V
—
0.581
LIN PHYSICAL LAYER: DRIVER CHARACTERISTICS FOR SLOW SLEW RATE - 10.4KBIT/SEC(46), (48)
Duty Cycle 3: D3 = tBUS_REC(MIN)/(2 x tBIT), tBIT = 96µs
D3
µs
µs
7.0V ≤ VSUP ≤ 18V
0.417
—
—
—
—
Duty Cycle 4: D4 = tBUS_REC(MAX)/(2 x tBIT), tBIT = 96µs
D4
7.6V ≤ VSUP ≤ 18V
0.590
Notes
44. This parameter is guaranteed by process monitoring but not production tested.
45. Delay between turn on or off command (rising edge on CS) and HS or LS ON or OFF, excluding rise or fall time due to external load.
46. Bus load RBUS and CBUS 1.0nF / 1.0 kΩ, 6.8 nF / 660Ω, 10nF / 500Ω. Measurement thresholds: 50% of TXD signal to LIN signal
threshold defined at each parameter. See Figure 6, page 18.
47. See Figure 7, page 18.
48. See Figure 8, page 18.
33912
Analog Integrated Circuit Device Data
Freescale Semiconductor
15
FREESCALE [ Freescale ]
