ELECTRICAL CHARACTERISTICS
TIMING DIAGRAMS
TXD
tBIT
tBIT
t
(MAX)
t
(MIN)
BUS_REC
BUS_DOM
VLIN_REC
t
- MAX
t
- MIN
REC
DOM
74.4% V
60.0% V
SUP
SUP
t
- MIN
DOM
58.1% V
40.0% V
58.1% V
40.0% V
SUP
SUP
LIN
SUP
SUP
28.4% V
SUP
28.4% V
SUP
42.2% V
SUP
t
- MIN
REC
t
- MAX
t
(MIN)
BUS_DOM
DOM
t
(MAX)
BUS_REC
RXD
t
t
RREC
RDOM
Figure 7. LIN Timing Measurements for Normal Slew Rate
TXD
tBIT
tBIT
t
(MAX)
t
(MIN)
BUS_REC
BUS_DOM
VLIN_REC
t
- MAX
t
- MIN
REC
DOM
77.8% V
60.0% V
SUP
SUP
t
- MIN
DOM
LIN
61.6% V
40.0% V
61.6% V
40.0% V
SUP
SUP
SUP
SUP
25.1% V
SUP
25.1% V
SUP
38.9% V
SUP
t
- MIN
REC
t
- MAX
t
(MIN)
BUS_DOM
DOM
t
(MAX)
BUS_REC
RXD
t
t
RREC
RDOM
Figure 8. LIN Timing Measurements for Slow Slew Rate
33912
Analog Integrated Circuit Device Data
Freescale Semiconductor
18
FREESCALE [ Freescale ]
