FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
Figure 23 illustrates how the wake-up signal is generated.
First the CAN signal is detected by a low consumption
receiver (WU receiver). Then the signal passes through a
pulse width filter, which discards the undesired pulses. The
pulse must have a width bigger than 0.5 µs and smaller than
500 µs to be accepted. When a pulse is discarded, the pulse
counter is reset and no wake-up signal is generated. When a
pulse is accepted, the pulse counter is incremented and, after
three pulses, the internal wake-up signal is asserted.
Each one of the pulses must be spaced by no more than
500 µs. If not, the counter will be reset and no wake-up signal
will be generated. This is accomplished by the wake-up
timeout generator. The wake-up cycle is completed (and the
wake-up flag reset) when the CAN interface is brought to
CAN Normal mode.
Pulse OK
Counter
Latch
RST
Internal Wake-Up
Signal
CANH
CANL
RST
Pulse Width
Filter
Time-out
Narrow
Pulse
+
WU Receiver
Standby
Time-out
Generator
Figure 23. Wake-Up Functional Block Diagram
After a CAN wake-up, a flag is set in the CAN register. Bit
CANWU reports the CAN wake-up event while the 33742
was in Sleep or Stop mode. This bit is set until the CAN is in
placed by SPI command into TXRX mode and the CAN
register can be read.
CAN WAKE-UP REPORT
The CAN wake-up reporting depend upon the low power
mode the SBC is in.
If the SBC is placed into Sleep mode (VDD and V2 off), the
CAN wake-up or any wake-up results in the VDD regulator
turning on, leading to turning on the MCU supply and
releasing reset. If the 33742 is in Stop mode (V2 off and VDD
active), the CAN wake-up or any wake-up is signalled by a
pulse on the INT output. In addition the CANWU bit is set in
the CAN register.
CAN BUS DIAGNOSTIC
The SBC can diagnose CANH or CANL lines short to
GND, shorts to VSUP or VDD.
As illustrated in Figure 24, several single-ended
comparators are implemented on the CANH and CANL bus
lines. These comparators monitor the bus voltage level in the
recessive and dominant states. This information is then
managed by a logic circuit to determine if a failure has
occurred and to report it. Table 11 indicates the state of the
comparators in the event of bus failure and the state of the
drivers; that is, whether they are recessive or dominant.
If the SBC is in Normal or Standby mode and the CAN
interface is in Sleep mode with wake-up enabled, the CAN
wake-up is reported by the CANWU bit in the CAN register.
In the event the SBC is in Normal mode and CAN Sleep
mode with wake-up enabled, it is recommended that the user
check for the CANWU bit prior to placing the 33742 in Sleep
or Stop mode in case bus traffic has occurred while the CAN
interface was in Sleep mode.
33742
Analog Integrated Circuit Device Data
Freescale Semiconductor
37
FREESCALE [ Freescale ]
