Package and Pin Listings
Table 55. MPC8349EA (TBGA) Pinout Listing (continued)
Power
Notes
Signal
Package Pin Number
Pin Type
Supply
PCI2_FRAME/GPIO2[1]
PCI2_TRDY/GPIO2[2]
PCI2_IRDY/GPIO2[3]
PCI2_STOP/GPIO2[4]
PCI2_DEVSEL/GPIO2[5]
PCI2_SERR/PCI1_ACK64
PCI2_PERR/PCI1_REQ64
PCI2_REQ[0:2]/GPIO2[6:8]
PCI2_GNT[0:2]/GPIO2[9:11]
M66EN
AE33
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
5
5
AF32
AE34
5
AF34
5
AF33
5
AG33
AG32
5
5
Y32, Y34, AA32
Y31, Y33, AA31
A19
—
—
—
DDR SDRAM Memory Interface
MDQ[0:63]
D5, A3, C3, D3, C4, B3, C2, D4, D2, E5,
G2, H6, E4, F3, G4, G3, H1, J2, L6, M6,
H2, K6, L2, M4, N2, P4, R2, T4, P6, P3,
R1, T2, AB5, AA3, AD6, AE4, AB4, AC2,
AD3, AE6, AE3, AG4, AK5, AK4, AE2,
AG6, AK3, AK2, AL2, AL1, AM5, AP5,
AM2, AN1, AP4, AN5, AJ7, AN7, AM8,
AJ9, AP6, AL7, AL9, AN8
I/O
GVDD
—
MECC[0:4]/MSRCID[0:4]
MECC[5]/MDVAL
MECC[6:7]
W4, W3, Y3, AA6, T1
I/O
I/O
I/O
O
GVDD
GVDD
GVDD
GVDD
GVDD
GVDD
GVDD
—
—
—
—
—
—
—
U1
Y1, Y6
MDM[0:8]
B1, F1, K1, R4, AD4, AJ1, AP3, AP7, Y4
B2, F5, J1, P2, AC1, AJ2, AN4, AL8, W2
AD1, AA5
MDQS[0:8]
I/O
O
MBA[0:1]
MA[0:14]
W1, U4, T3, R3, P1, M1, N1, L3, L1, K2,
Y2, K3, J3, AP2, AN6
O
MWE
AF1
AF4
O
O
O
O
O
O
O
O
GVDD
GVDD
GVDD
GVDD
GVDD
GVDD
GVDD
GVDD
—
—
—
—
3
MRAS
MCAS
AG3
MCS[0:3]
MCKE[0:1]
MCK[0:5]
MCK[0:5]
MODT[0:3]
AG2, AG1, AK1, AL4
H3, G1
U2, F4, AM3, V3, F2, AN3
U3, E3, AN2, V4, E1, AM4
AH3, AJ5, AH1, AJ4
—
—
—
MPC8349EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 13
Freescale Semiconductor
57
FREESCALE [ Freescale ]
