Package and Pin Listings
Table 55. MPC8349EA (TBGA) Pinout Listing (continued)
Power
Notes
Signal
Package Pin Number
Pin Type
Supply
Gigabit Reference Clock
EC_GTX_CLK125
C8
I
LVDD1
—
Three-Speed Ethernet Controller (Gigabit Ethernet 1)
TSEC1_COL/GPIO2[20]
TSEC1_CRS/GPIO2[21]
TSEC1_GTX_CLK
A17
I/O
I/O
O
OVDD
LVDD1
LVDD1
LVDD1
LVDD1
OVDD
OVDD
LVDD1
OVDD
OVDD
LVDD1
LVDD1
OVDD
—
—
3
F12
D10
TSEC1_RX_CLK
A11
I
—
—
—
—
—
—
—
10
—
—
TSEC1_RX_DV
B11
I
TSEC1_RX_ER/GPIO2[26]
TSEC1_RXD[7:4]/GPIO2[22:25]
TSEC1_RXD[3:0]
B17
I/O
I/O
I
B16, D16, E16, F16
E10, A8, F10, B8
TSEC1_TX_CLK
D17
I
TSEC1_TXD[7:4]/GPIO2[27:30]
TSEC1_TXD[3:0]
A15, B15, A14, B14
I/O
O
A10, E11, B10, A9
TSEC1_TX_EN
B9
O
TSEC1_TX_ER/GPIO2[31]
A16
I/O
Three-Speed Ethernet Controller (Gigabit Ethernet 2)
TSEC2_COL/GPIO1[21]
TSEC2_CRS/GPIO1[22]
TSEC2_GTX_CLK
C14
I/O
I/O
O
OVDD
LVDD2
LVDD2
LVDD2
LVDD2
OVDD
LVDD2
OVDD
OVDD
OVDD
—
—
—
—
—
—
—
—
—
—
D6
A4
TSEC2_RX_CLK
B4
I
TSEC2_RX_DV/GPIO1[23]
TSEC2_RXD[7:4]/GPIO1[26:29]
TSEC2_RXD[3:0]/GPIO1[13:16]
TSEC2_RX_ER/GPIO1[25]
TSEC2_TXD[7]/GPIO1[31]
E6
A13, B13, C13, A12
D7, A6, E8, B7
D14
I/O
I/O
I/O
I/O
I/O
O
B12
TSEC2_TXD[6]/
C12
DR_XCVR_TERM_SEL
TSEC2_TXD[5]/
DR_UTMI_OPMODE1
D12
E12
O
O
OVDD
OVDD
LVDD2
—
—
—
TSEC2_TXD[4]/
DR_UTMI_OPMODE0
TSEC2_TXD[3:0]/GPIO1[17:20]
B5, A5, F8, B6
I/O
MPC8349EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 13
Freescale Semiconductor
61
FREESCALE [ Freescale ]
