Package and Pin Listings
Table 55. MPC8349EA (TBGA) Pinout Listing (continued)
Power
Notes
Signal
Package Pin Number
Pin Type
Supply
GPIO1[2]/DMA_DDONE0/
GTM1_TOUT1
B25
I/O
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
—
—
—
—
—
—
—
—
—
—
GPIO1[3]/DMA_DREQ1/GTM1_TIN2/
GTM2_TIN1
D24
A25
B24
A24
D23
B23
A23
F22
E22
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GPIO1[4]/DMA_DACK1/
GTM1_TGATE2/GTM2_TGATE1
GPIO1[5]/DMA_DDONE1/
GTM1_TOUT2/GTM2_TOUT1
GPIO1[6]/DMA_DREQ2/GTM1_TIN3/
GTM2_TIN4
GPIO1[7]/DMA_DACK2/
GTM1_TGATE3/GTM2_TGATE4
GPIO1[8]/DMA_DDONE2/
GTM1_TOUT3
GPIO1[9]/DMA_DREQ3/GTM1_TIN4/
GTM2_TIN3
GPIO1[10]/DMA_DACK3/
GTM1_TGATE4/GTM2_TGATE3
GPIO1[11]/DMA_DDONE3/
GTM1_TOUT4/GTM2_TOUT3
USB Port 1
MPH1_D0_ENABLEN/
DR_D0_ENABLEN
A26
I/O
I/O
I/O
OVDD
OVDD
OVDD
—
—
—
MPH1_D1_SER_TXD/
DR_D1_SER_TXD
B26
D25
MPH1_D2_VMO_SE0/
DR_D2_VMO_SE0
MPH1_D3_SPEED/DR_D3_SPEED
MPH1_D4_DP/DR_D4_DP
A27
B27
C27
D26
I/O
I/O
I/O
I/O
OVDD
OVDD
OVDD
OVDD
—
—
—
—
MPH1_D5_DM/DR_D5_DM
MPH1_D6_SER_RCV/
DR_D6_SER_RCV
MPH1_D7_DRVVBUS/
DR_D7_DRVVBUS
E26
I/O
OVDD
—
MPH1_NXT/DR_SESS_VLD_NXT
D27
A28
I
OVDD
OVDD
—
—
MPH1_DIR_DPPULLUP/
I/O
DR_XCVR_SEL_DPPULLUP
MPH1_STP_SUSPEND/
DR_STP_SUSPEND
F26
O
OVDD
—
MPC8349EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 13
Freescale Semiconductor
59
FREESCALE [ Freescale ]
