F81867
7.11 RTC RAM Registers (LDN 0x0B)
Default Value
Register
0x[HEX]
Register Name
MSB
LSB
30
60
61
RTC RAM Enable Register
-
-
-
-
-
-
-
1
1
1
Base Address High Register
Base Address Low Register
0
1
0
0
0
0
0
1
0
0
0
1
0
0
RTC RAM Enable Register ⎯ Index 30h
Bit
Name
R/W Reset Default
Description
7-1
Reserved
-
-
-
Reserved
0: disable RTC RAM.
1: enable RTC RAM.
0
RTC_RAM_EN
R/W VBAT
1
Base Address High Register ⎯ Index 60h
Bit
Name
R/W Reset Default
Description
7-0
BASE_ADDR_HI
R/W VBAT 02h The MSB of RTC RAM base address.
Base Address Low Register ⎯ Index 61h
Bit
Name
R/W Reset Default
Description
The LSB of RTC RAM base address.
The RTC RAM is accessed by index/data port. The index port is
{BASE_ADDR_HI, BASE_ADDR_LO[7:1],1’b0} and the data port is
{BASE_ADDR_HI, BASE_ADDR_LO[7:1], 1’b1}. Write the index first to
7-0
BASE_ADDR_LO
R/W VBAT
95h
select the RAM address and then read/write data port to access the context
of RAM.
7.12 H2E Configuration Registers (LDN 0x0E)
Default Value
Register 0x[HEX]
Register Name
H2E I/O Enable Register
MSB
LSB
30
60
61
70
-
0
0
-
-
0
0
-
-
0
0
-
-
0
0
-
-
-
-
0
0
0
0
Base Address High Register
Base Address Low Register
H2E IRQ Channel Select Register
0
0
0
0
0
0
0
0
0
FDC Device Enable Register ⎯ Index 30h
Bit
Name
R/W Reset Default
Description
7-1
Reserved
-
-
-
Reserved
0: disable H2E.
1: enable H2E.
0
H2E_EN
R/W 5VSB
1
187
Dec, 2011
V0.12P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
