F81866A
I2C Protocol Select – Index EFh
Bit
Name
R/W
Reset Default
Description
Write “1” to trigger I2Ctransfer with the protocol specified by
I2C_PROTOCOL.
7
I2C_START
W
-
-
0
-
6-4
Reserved
-
Reserved.
Select what protocol if I2Ctransfer is triggered.
0001b: send byte.
0010b: write byte.
0011b: write word.
0100b: Reserved.
0101b: block write.
3-0
I2C_PROTOCOL
R/W
0111b: quick command (write).
1001b: receive byte.
5VSB
0
1010b: read byte.
1011b: read word.
1101b: block read.
1111b: Reserved
Otherwise: reserved.
6.4.2.3 PECI 3.0 & Temperature Setting
PECI 3.0 Command and Register
PECI Configuration Register ⎯ Index 40h
Bit
Name
R/W Reset Default
Description
When PECI temperature monitoring is enabled, set this bit 1 will generate
a RdIAMSR() command before a GetTemp() command.
7
RDIAMSR_CMD_EN R/W
5VSB
0
If RDIAMSR_CMD_EN is not set to 1, the temperature data is not
allowed to be updated when the completion code of RdIAMSR() is 0x82.
6
5-4
3
C3_UPDATE_EN
Reserved
R/W
R
5VSB
-
0
-
Reserved
Set this bit 1 to enable updating positive value of temperature if the
completion code of RdIAMSR() is 0x82.
C3_PTEMP_EN
R/W 5VSB
R/W 5VSB
R/W 5VSB
R/W 5VSB
0
Set this bit 1 to enable updating positive value of temperature if the
completion code of RdIAMSR() is not 0x82 and the bit 8 of completion
code is not 1 either.
2
1
0
C0_PTEMP_EN
C3_ALL0_EN
C0_ALL0_EN
0
0
0
Set this bit 1 to enable updating temperature value 0x0000 if the
completion code of RdIAMSR() is 0x82.
Set this bit 1 to enable updating temperature value 0x0000 if the
completion code of RdIAMSR() is not 0x82 and the bit 8 of completion
code is not 1 either.
PECI Master Control Register ⎯ Index 41h
Bit
Name
R/W Reset Default
Description
Write 1 to this bit to start a PECI command when using as a PECI master.
(PECI_PENDING must be set to 1)
7
PECI_CMD_START
W
5VSB
-
52
Jan, 2012
V0. 12P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
