欢迎访问ic37.com |
会员登录 免费注册
发布采购

F81866A 参数 Datasheet PDF下载

F81866A图片预览
型号: F81866A
PDF下载: 下载PDF文件 查看货源
内容描述: 6个UART超级IO 128字节FIFO和电源 [6 UARTs Super IO With 128 Bytes FIFO and Power]
分类和应用: 先进先出芯片
文件页数/大小: 210 页 / 1806 K
品牌: FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
 浏览型号F81866A的Datasheet PDF文件第116页浏览型号F81866A的Datasheet PDF文件第117页浏览型号F81866A的Datasheet PDF文件第118页浏览型号F81866A的Datasheet PDF文件第119页浏览型号F81866A的Datasheet PDF文件第121页浏览型号F81866A的Datasheet PDF文件第122页浏览型号F81866A的Datasheet PDF文件第123页浏览型号F81866A的Datasheet PDF文件第124页  
F81866A  
7.1.11Multi-function Select 2 Register Index 28h (Available when GPIO_PROG_SEL[0] = 1)  
Bit  
Name  
R/W  
Description  
Default  
Reset  
7-2  
Reserved  
-
-
-
Reserved  
0: The pin function is ALERT#/GPIO20/SCL.  
1: Reserved.  
1
0
PIN76_EN  
PIN71_EN  
R/W  
R/W  
VBAT  
VBAT  
0
0
0: The pin function is BEEP/GPIO16/SDA.  
1: Reserved.  
7.1.12Multi Function Select 3 Register Index 29h (Available when CLK_ TUNE_PROG_EN = 0)  
Bit  
Name  
R/W Reset Default  
Description  
UART4 Function Select.  
00: No UART4 pin. Pin 44 ~ 51 are all GPIOs.  
01: Simple UART, only SIN4 and SOUT4 are available. Pin 50 will be  
function as SOUT4 and Pin 51 will be function as SIN4.  
UART4_FUNC_SE  
L
7-6  
R/W  
0
5VSB  
10: Simple UART with RTS# function only. Pin 48 will be function as  
RTS4#.  
11: Full UART, pin 44 ~ 51 will be function as UART pins.  
UART3 Function Select.  
00: No UART3 pin. Pin 36 ~ 43 are all GPIOs.  
01: Simple UART, only SIN3 and SOUT3 are available. Pin 42 will be  
function as SOUT3 and Pin 43 will be function as SIN3.  
UART3_FUNC_SE  
L
5-4  
R/W 5VSB  
0
10: Simple UART with RTS# function only. Pin 40 will be function as  
RTS3#.  
11: Full UART, pin 36 ~ 43 will be function as UART pins.  
0: Disable SCL from pin 76.  
1: Enable SCL from pin 76.  
3
2
1
0
SCL_PIN76_EN R/W 5VSB  
SDA_PIN71_EN R/W 5VSB  
SDA_PIN68_EN R/W 5VSB  
SCL_PIN67_EN R/W 5VSB  
0
0
1
1
There is only one slave in the current design, it is recommended to  
select only one pin for SCL. When multi pins are selected, the priority of  
these bits is MO_I2C_EN > SCL_PIN76_EN > SCL_PIN67_EN.  
0: Disable SDA from pin 76.  
1: Enable SDA from pin 76.  
There is only one slave in the current design, it is recommended to  
select only one pin for SDA. When multi pins are selected, the priority of  
these bits is MO_I2C_EN > SDA_PIN71_EN > SDA_PIN68_EN.  
0: Disable SDA from pin 68.  
1: Enable SDA from pin 68.  
There is only one slave in the current design, it is recommended to  
select only one pin for SDA. When multi pins are selected, the priority of  
these bits is MO_I2C_EN > SDA_PIN71_EN > SDA_PIN68_EN.  
0: Disable SCL from pin 67.  
1: Enable SCL from pin 67.  
There is only one slave in the current design, it is recommended to  
select only one pin for SCL. When multi pins are selected, the priority of  
these bits is MO_I2C_EN > SCL_PIN76_EN > SCL_PIN67_EN.  
120  
Jan, 2012  
V0. 12P  
 复制成功!