F75113
23
24
25
26
27
28
29
2A
2B
2C
2D
2E
30
31
32
33
34
35
36
37
38
39
3A
3B
3C
3D
3E
3F
40
41
42
43
44
45
46
47
GPIO1X Level / Pulse Control Register
GPIO1X pulse width control Register
GPIO1X internal pull-high enable Register
GPIO1X debounce enable Register
GPIO1X pin inverse enable Register
GPIO1X edge detect enable Register
GPIO1X edge detect status Register
SMI event of GPIO1x port enable Register
GPIO1X output buffer enable Register
GPIO1X debounce timing select Register
LED1X frequency select Register
LED1X frequency select Register
GPIO2X output control Register
0
-
0
-
0
-
0
-
0
-
0
-
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
0
0
0
0
0
0
-
GPIO2X output control Register
GPIO2X pin status Register
GPIO2X Level / Pulse Control Register
GPIO2X pulse width control Register
GPIO2X internal pull-high enable Register
GPIO2X debounce enable Register
GPIO2X pint inverse enable Register
GPIO2X edge detect enable Register
GPIO2X edge detect status Register
SMI event of GPIO2X port enable Register
GPIO2X output buffer enable Register
GPIO2X debounce timing select Register
LED2X frequency select Register
LED2X frequency select Register
GPIO2X low level input enable Register
GPIO3X output control Register
0
-
0
-
0
-
0
-
0
-
0
-
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
0
0
0
0
0
0
0
-
GPIO3X output control Register
GPIO3X pin status Register
GPIO3X Level / Pulse Control Register
GPIO3X pulse width control Register
GPIO3X internal pull-high enable Register
GPIO3X debounce enable Register
GPIO3X pin inverse enable Register
0
-
0
-
0
-
0
-
0
-
0
-
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
- 19 -
Dec,2011
V0.13P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
