F75113
“-“ Reserved or Tri-State
GPIO Device Configuration Registers (LDN 01h)
Register
0x[HEX]
Default Value
Register Name
MSB
LSB
00
01
02
03
04
Reserved
-
-
-
-
-
-
-
-
Chip control Register
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
GPIO0X mode control Register
GPIO0X mode control Register
GPIO1X mode control Register
05
06
08
09
0A
0B
0C
0E
0F
10
11
GPIO1X mode control Register
GPIO2X mode control Register
WDT1 control Register
0
0
-
0
0
-
0
0
-
0
0
-
0
0
-
0
0
0
0
0
0
0
-
0
0
-
0
0
0
0
0
0
1
-
WDT1 count Register
0
-
0
-
0
0
0
1
-
0
0
0
0
-
0
0
0
0
-
0
0
0
1
-
WDT2 control Register
WDT2 count Register
0
0
-
0
1
-
PD count Register
Reserved
Reserved
-
-
-
-
-
-
-
-
Chip control Register
0
0
-
0
0
-
0
0
-
0
0
-
0
0
-
0
0
-
0
0
-
0
0
-
GPIO0X output control Register
GPIO0X pin status Register
GPIO0X Level / Pulse Control Register
GPIO0X pulse width control Register
GPIO0X internal pull-high enable Register
GPIO0X debounce enable Register
GPIO0X pin inverse enable Register
GPIO0X edge detect enable Register
GPIO0X edge detect status Register
SMI event of GPIO0X port enable Register
GPIO0X output buffer enable Register
GPIO0X debounce timing select Register
LED0X frequency select Register
LED0X frequency select Register
GPIO1X output control Register
GPIO1X output control Register
GPIO1X pin status Register
12
13
14
15
16
17
18
19
1A
1B
1C
1D
1E
20
21
22
0
-
0
-
0
-
0
-
0
-
0
-
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
0
0
0
0
0
0
-
- 18 -
Dec,2011
V0.13P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
