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F71862FG 参数 Datasheet PDF下载

F71862FG图片预览
型号: F71862FG
PDF下载: 下载PDF文件 查看货源
内容描述: 超级硬件监控+ LPC I / O [Super Hardware Monitor + LPC I/O]
分类和应用: 监控PC
文件页数/大小: 110 页 / 837 K
品牌: FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
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F71862  
4
3
SPI0_TIMER_DIS  
R/W  
-
When SPI is used as primary BIOS, it will also have backup function as used in  
backup BIOS. The bit will set to 1 when the time in second reaches the value  
programmed in TIMER_VAL (CRF1). That is the first SPI could not function  
well. Then a reset signal will asserted and reboot the system with the second  
SPI. (I could be another SPI with chip-selected by FWH_DIS or another 4Mbits  
of an 8Mbits SPI. The SPI_CS1_EN (CR2D[4]) determines the method). Write  
one to clear this bit.  
SPTEF  
R
-
0
-
SPI operation status. When SPI is transferred or received data from device,  
this bit will be set 1, Clear by SPI operation finish.  
2-0 Reserved  
Reserved  
SPI High Byte Data Register Index F4h  
Bit Name R/W Default  
Description  
7-0 H_DATA  
R
0
When SPI is received 16 bits data from device. This register saves high byte  
data.  
SPI command data Register Index F5h  
Bit Name R/W Default  
Description  
7-0 CMD_DATA  
R/W  
0
This register provides command value for flash command.  
SPI chip select Register Index F6h  
Bit Name R/W Default  
Description  
7-4 Reserved  
-
-
Reserved  
3
2
1
0
Dummy_Reg  
R/W  
R/W  
R/W  
R/W  
0
0
0
0
Dummy register.  
Dummy_Reg  
Dummy_Reg  
CS0  
Dummy register.  
Dummy register.  
Chip select 0. To select device 0  
SPI memory mapping Register Index F7h  
Bit Name R/W Default  
Description  
7-3 Reserved  
2-0 Mem_map  
-
0
-
Reserved  
R/W  
This register decides memory size.  
3’b000: one of the memory sizes is 512k bytes.  
3’b001: one of the memory sizes is 1024k bytes.  
3’b100: one of the memory sizes is 2048k bytes.  
3’b011: one of the memory sizes is 4096k bytes.  
3’b100: one of the memory sizes if 8092k bytes.  
SPI operate Register Index F8h  
Bit  
Name  
R/W Default  
Description  
7
TYPE  
R/W  
R/W  
0
0
This bit decide flash continuous programming mode. Set to 1, if programming  
continuous mode is same as the SST flash. Set to 0 if programming continuous  
mode is same as the ATMEL flash  
6
IO_SPI  
This bit control SPI function transfer 8 bit command to device. Clear 0 by  
operation finish.  
96  
July, 2008  
V.28P  
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