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F71869AD 参数 Datasheet PDF下载

F71869AD图片预览
型号: F71869AD
PDF下载: 下载PDF文件 查看货源
内容描述: 超级I / O +硬件监控 [Super I/O + Hardware Monitor]
分类和应用: 监控
文件页数/大小: 156 页 / 1561 K
品牌: FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
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F71869A  
PECI 3.0 Command and Register  
6.6.21 PECI Configuration Register Index 40h  
Bit  
Name  
R/W Default  
Description  
RDIAMSR_CMD_E  
N
When PECI temperature monitoring is enabled, set this bit 1 will  
generate a RdIAMSR() command before a GetTemp() command.  
If RDIAMSR_CMD_EN is not set to 1, the temperature data is not  
allowed to be updated when the completion code of RdIAMSR() is  
0x82.  
7
R/W  
0
6
C3_UPDATE_EN R/W  
Reserved  
0
5-4  
3
R
-
Reserved  
Set this bit 1 to enable updateing positive value of temperature if the  
completion code of RdIAMSR() is 0x82.  
C3_PTEMP_EN R/W  
0
Set this bit 1 to enable updating positive value of temperature if the  
completion code of RdIAMSR() is not 0x82 and the bit 8 of  
completion code is not 1 either.  
Set this bit 1 to enable updating temperature value 0x0000 if the  
completion code of RdIAMSR() is 0x82.  
Set this bit 1 to enable updating temperature value 0x0000 if the  
completion code of RdIAMSR() is not 0x82 and the bit 8 of  
completion code is not 1 either.  
2
1
0
C0_PTEMP_EN R/W  
0
0
0
C3_ALL0_EN  
C0_ALL0_EN  
R/W  
R/W  
6.6.22 PECI Master Control Register Index 41h  
Bit  
Name  
R/W Default  
Description  
PECI_CMD_STAR  
T
Write 1 to this bit to start a PECI command when using as a PECI  
master. (PECI_PENDING must be set to 1)  
7
W
-
6-5  
4
Reserved  
PECI_PENDING  
Reserved  
R
R/W  
R
-
0
-
Reserved  
Set this bit 1 to stop monitoring PECI temperature.  
Reserved  
3
PECI command to be used by PECI master.  
000: PING()  
001: GetDIB()  
010: GetTemp()  
011: RdIAMSR()  
2-0  
PECI_CMD  
R/W  
3’h0  
100: RdPkgConfig()  
101: WrPkgConfig()  
others: Reserved  
6.6.23 PECI Master Status Register Index 42h  
Bit  
Name  
R/W Default  
Description  
7-3  
Reserved  
R
-
-
Reserved  
R/W  
C
R/W  
C
R/W  
C
This bit is the Abort FCS status of PECI master commands. Write  
this bit 1 or read this byte will clear this bit to 0.  
This bit is the FCS error status of PECI master commands. Write this  
bit 1 or read this byte will clear this bit to 0.  
This bit is the Command Finish status of PECI master commands.  
Write this bit 1 or read this byte will clear this bit to 0.  
2
1
0
ABORT_FCS  
PECI_FCS_ERR  
PECI_FINISH  
-
-
77  
Oct., 2011  
V0.19P  
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