F71869A
If set this bit to 1, PME# signal will be issued when TEMP1 exceeds
OVT setting.
5
4
3
EN_ T1_OVT_PME R/W
Reserved R/W
0
0
0
Reserved
If set this bit to 1, PME# signal will be issued when TEMP3 exceeds
EN_ T3_EXC_PME R/W
EN_ T2_EXC_PME R/W
EN_ T1_EXC_PME R/W
high limit setting.
If set this bit to 1, PME# signal will be issued when TEMP2 exceeds
2
0
high limit setting.
If set this bit to 1, PME# signal will be issued when TEMP1 exceeds
1
0
0
0
high limit setting.
Reserved
Reserved
R/W
6.6.38 Temperature Interrupt Status Register ⎯ Index 61h
Bit
Name
R/W Default
Description
This bit gets 1 to indicate TEMP3 temperature sensor has exceeded
OVT limit or below the “OVT limit –hysteresis”. Write 1 to clear this
bit, and write 0 to ignore.
7
T3_OVT_STS
R/W
R/W
0
0
This bit gets 1 to indicate TEMP2 temperature sensor has exceeded
OVT limit or below the “OVT limit –hysteresis”. Write 1 to clear this
bit, write 0 to ignore.
6
T2_OVT _STS
This bit gets 1 to indicate TEMP1 temperature sensor has exceeded
OVT limit or below the “OVT limit –hysteresis”. Write 1 to clear this
bit, write 0 to ignore.
5
4
3
T1_OVT _STS
Reserved
R/W
R/W
R/W
0
0
0
Reserved
This bit gets 1 to indicate TEMP3 temperature sensor has exceeded
high limit or below the “high limit –hysteresis”. Write 1 to clear this
bit, write 0 to ignore.
T3_EXC _STS
This bit gets 1 to indicate TEMP2 temperature sensor has exceeded
high limit or below the “high limit –hysteresis” limit. Write 1 to clear
this bit, write 0 to ignore.
2
T2_EXC _STS
R/W
0
This bit gets 1 to indicate TEMP1 temperature sensor has exceeded
high limit or below the “high limit –hysteresis” limit. Write 1 to clear
this bit, write 0 to ignore.
1
0
T1_EXC _STS
Reserved
R/W
R/W
0
0
Reserved
80
Oct., 2011
V0.19P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
