F71869A
GPIO11/PCIRST5#/SDA function select.
If IBX_ALT_EN is set , the ping function is SDA, otherwise the pin
function is determined by this bit:
1
GPIO11_EN
R/W
1
0: The pin function is PCIRST5#.
1: The pin function is GPIO11.
GPIO10/PCIRST4#/SCL function select.
If IBX_ALT_EN is set , the ping function is SCL, otherwise the pin
function is determined by this bit:
0
GPIO10_EN
R/W
1
0: The pin function is PCIRST4#.
1: The pin function is GPIO10.
6.1.12 WDT Clock Divisor High Byte ⎯ Index 29h (Powered by VBAT, CLK_TUNE_EN = 1)
Bit
Name
R/W Default
Description
WDT_TUNE_STAR
T
Write “1” to this bit to start count internal 500KHz period (10 times).
7
W
-
-
-
6-4
3-0
Reserved
Reserved.
This is the high nibble of 12-bit divisor for WDT clock. The clock used
for WDT is 10Hz which is divided by internal 10KHz clock. Program
this divisor to fine tune clock.
WDT_CLK_DIV[11:
8]
R/W
3h
6.1.13 Multi-Function Select Register 3 ⎯ Index 2Ah (Powered by VBAT, CLK_TUNE_EN = 0)
Bit
Name
R/W Default
Description
Parallel Port/GPIO function select.
7
LPT_GP_EN
R/W
R/W
0
0
0: Pin 100 ~ 116 functions as Parallel Port.
1: Pin 100 ~ 116 functions as GPIO6 and GPIO7.
Alternative IBX pin enable.
0: Disable IBX alternative pins.
6
IBX_ALT_EN
1: Enable IBX alternative pins. See GPIO11_EN and GPIO10_EN for
detail.
59
Oct., 2011
V0.19P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
