XRT86L30
SINGLE T1/E1/J1 FRAMER/LIU COMBO
REV. 1.0.1
TABLE 32: DATA
L
INK
CONTROL REGISTER
R
EGISTER 19
IT
D
ATA
L
INK
C
ONTROL EGISTER 1 (DLCR1)
R
HEX ADDRESS: 0X0113
B
F
UNCTION
T
YPE
D
EFAULT
DESCRIPTION-OPERATION
7
SLC-96
R/W
0
SLC
®
96 Enable, 6 bit for ESF
96 framing is selected, setting this bit high will enable
®96 data link transmission; Otherwise, the regular SF framing
If SLC
SLC
®
bits are transmitted.
In ESF framing mode, setting this bit high will cause facility data link
to transmit/receive SLC®96-like message.
6
MOSA
R/W
0
MOS Abort Enable/Disable Select
This Read/Write bit-field is used to configure the transmit HDLC1
controller to automatically transmit an abort sequence anytime it
transitions from the MOS mode to the BOS mode.
0 = Transmit HDLC1 Controller inserts an MOS abort sequence if
the MOS message is interrupted
1 = Prevents Transmit HDLC1 Controller from inserting an MOS
abort sequence.
5
4
Rx_FCS_DIS
R/W
R/W
0
0
Receive FCS Verification Disable
Enables/Disables Receive HDLC1 Controller’s computation and
verification of the FCS value in the incoming LAPD message frame
0 = Verifies FCS value of each MOS frame.
1 = Does not verify FCS value of each MOS frame.
AutoRx
Auto Receive LAPD Message
Configures the Rx HDLC1 Controller to discard any incoming LAPD
Message frame that exactly match which is currently stored in the
Rx HDLC1 buffer.
0 = Disabled
1 = Enables this feature.
3
Tx_ABORT
R/W
0
Transmit ABORT
Configures the Tx HDLC1 Controller to transmit an ABORT
sequence (string of 7 or more consecutive 1’s) to the Remote termi-
nal.
0 = Tx HDLC1 Controller operates normally
1 = Tx HDLC1 Controller inserts an ABORT sequence into the data
link channel.
2
Tx_IDLE
R/W
0
Transmit Idle (Flag Sequence Byte)
Configures the Tx HDLC1 controller to transmit a string of Flag
Sequence octets (0X7E) in the data link channel to the Remote ter-
minal.
0 = Tx HDLC1 Controller resumes transmitting data to the Remote
terminal
1 = Tx HDLC1 Controller transmits a string of Flag Sequence bytes.
NOTE
:
This bit-field is ignored if the Tx HDLC1 controller is
operating in the BOS Mode - bit-field 0(MOS/BOS) within
this register is set to 0.
55
EXAR [ EXAR CORPORATION ]
