XRT86L30
REV. 1.0.1
SINGLE T1/E1/J1 FRAMER/LIU COMBO
EGISTER (RS&DLSR) T1 MODE
EGISTER (RS&DLSR)
T
ABLE 25: RECEIVE
S
IGNALING & DATA
L
INK
INK
S
ELECT
R
R
EGISTER 12 - T1 MODE
RECEIVE
SIGNALING & DATA
L
S
ELECT
R
H
EX
A
DDRESS: 0
X
010C
B
IT UNCTION
F
TYPE
D
EFAULT
DESCRIPTION-OPERATION
1
0
RxDL[1]
RxDL[0]
R/W
R/W
0
0
DL Select
00 = LAPD Controller/SLC96 Buffer. The data link bits are extracted
from the LAPD controller. (LAPD1 is the only controller that can be
used to extract LAPD messages through the data link bits)
01 = Serial Input. The data link bits are extracted to the serial data out-
put.
10 = Overhead Input. The data link bits are extracted to the overhead
output.
11 = None (forced to 1). The data link bits are forced to 1.
TABLE 26: SIGNALING
C
HANGE
R
EGISTER 0 - T1 MODE
R
EGISTER 13 - T1/E1 MODE
IT UNCTION
S
IGNALING
C
HANGE
R
EGISTER 0 (SCR 0)
HEX ADDRESS: 0X010D
B
F
TYPE
D
EFAULT
DESCRIPTION-OPERATION
7
Ch. 0
Ch. 1
Ch.2
Ch.3
Ch.4
Ch.5
Ch.6
Ch.7
RUR
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
0
0
These Reset Upon Read bits indicate whether the signaling data asso-
ciated with Channels 0-7 has changed since the last read of this regis-
ter.
6
5
4
3
2
1
0
0 = Signaling data has not changed since last read of register
1 = Signaling data has changed since last read of register
N
OTE: For E1, Ch. 0 is not applicable since it carries FAS and National
Bits in alternating frames. This register is only relevant if the
Framing Channel is using Channel Associated Signaling
TABLE 27: SIGNALING
C
HANGE
REGISTER 1
R
EGISTER 14 T1/E1 MODE
IT UNCTION
S
IGNALING
C
HANGE
R
EGISTER 1 (SCR 1)
HEX ADDRESS: 0X010E
B
F
TYPE
D
EFAULT
DESCRIPTION-OPERATION
7
Ch.8
RUR
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
0
0
These Reset Upon Read bits indicate whether the signaling data asso-
ciated with Channels 8-15 has changed since the last read of this regis-
ter.
6
5
4
3
2
1
0
Ch.9
0 = Signaling data has not changed since last read of register
1 = Signaling data has changed since last read of register
Ch.10
Ch.11
Ch.12
Ch.13
Ch.14
Ch.15
NOTE: This register is only relevant if the Framing Channel is using
Channel Associated Signaling
52