XRT86L30
REV. 1.0.1
SINGLE T1/E1/J1 FRAMER/LIU COMBO
TABLE 18: SYNCHRONIZATION MUX REGISTER - E1 MODE
R
EGISTER 9 - E1 MODE
IT UNCTION
S
YNCHRONIZATION MUX REGISTER (SMR)
HEX ADDRESS: 0X0109
B
F
TYPE
D
EFAULT
DESCRIPTION-OPERATION
7-6 ESRC[1:0]
R/W
0
Source for E bits
These bits determine where the E bits should be inserted from.
00 = Transparent, inserted from the status of receiver.
01 = 0.
10 = 1.
11 = Data link.
5
4
Reserved
-
-
Reserved
SYNC INV
R/W
0
Sync Inversion Select
Selects the direction of the transmit sync and multisync signals.
0 = Syncs are input if the CSS(1:0) bits of CSR equal 01 (TxSerClk
input is
selected as the timing reference for the Transmit section of the
framer);
otherwise syncs are outputs
1 = Syncs are output if CSS(1:0) bits of CSR equal 01 (TxSerClk
input is
selected as the timing reference for the Transmit section of the
framer);
otherwise syncs are inputs
3
2
DLSRC(1)
DLSRC(0)
R/W
R/W
0
0
Data Link Source Select
Specifies the source of the Data Link bits that will be inserted in the
outbound E1 frames.
00 = TxSER Input: Transmit Payload data Input port will be source of
Data Link bits.
01 = TX HDLC Controller: Transmit HDLC Controller will generate
either BOS
(Bit Oriented Signaling) or MOS (Message Oriented Signaling)
messages
which will be inserted into the Data Link bit-fields in the outbound
E1
frames.
10 = TxOH_n Input: Transmit Overhead data Input Port will be the
source of
the Data Link bits.
11 = TxSer_n Input: Transmit Payload data Input port will be the
source of the
Data Link Bits.
44
EXAR [ EXAR CORPORATION ]
