XRT86L30
SINGLE T1/E1/J1 FRAMER/LIU COMBO
REV. 1.0.1
TABLE 144: MICROPROCESSOR
R
EGISTER #557 BIT
D
ESCRIPTION
R
EGISTER ADDRESS
R
EGISTER
YPE
R
VALUE
ESET
C
HANNEL_0
T
0X0F01H
F
UNCTION
B
IT
#
NAME
D7
D6
D5
RXTSEL_n Receiver Termination Select: In Host mode, this bit is used to
select between the internal termination and “High” impedance
modes for the receiver according to the following table;
R/W
R/W
R/W
0
0
0
RXTSEL
RX Termination
"High" Impedance
Internal
0
1
TXTSEL_n Transmit Termination Select: In Host mode, this bit is used to
select between the internal termination and “High” impedance
modes for the transmitter according to the following table;
TXTSEL
TX Termination
"High" Impedance
Internal
0
1
TERSEL1_n Termination Impedance Select1:
In Host mode and in internal termination mode, (TXTSEL = “1”
and RXTSEL = “1”) TERSEL[1:0] control the transmit and
receive termination impedance according to the following table;
TERSEL1 TERSEL0
Termination
100Ω
0
0
1
1
0
1
0
1
110Ω
75Ω
120Ω
In the internal termination mode, the receiver termination of
each receiver is realized completely by internal resistors or by
the combination of internal and one fixed external resistor.
In the internal termination mode, the transmitter output should
be AC coupled to the transformer.
D4
D3
TERSEL0_n Termination Impedance Select bit 0:
R/W
R/W
0
0
RxJASEL_n Receive Jitter Attenuator Enable
The bit is used to enable the receive jitter attenuator.
“0” = Disabled
“1” = Enable the Receive Jitter Attenuator
D2
TxJASEL_n Transmit Jitter Attenuator Enable
The bit is used to enable the transmit jitter attenuator.
“0” = Disabled
R/W
0
“1” = Enable the Transmit Jitter Attenuator
121
EXAR [ EXAR CORPORATION ]
