ST16C650A
2.90V TO 5.5V UART WITH 32-BYTE FIFO
áç
REV. 5.0.0
2.0 FUNCTIONAL DESCRIPTIONS
2.1
Host Data Bus Interface
The host interface is 8 data bits wide with 3 address lines and control signals to execute bus read and write
transactions. The 650A supports 3 type of host interfaces: Intel, Motorola and PC mode. The Intel and
Motorola interfaces provide support for their respective microcontroller or processor. This facilitates the
hardware design and interconnections. The Intel bus interface is selected by connecting IM# to logic 0 and
SEL to logic 1. The Intel bus interconnections are shown in Figure 3. The Motorola bus is selected with the IM#
input connected to logic 1 and SEL input ties to logic 1. The Motorola bus interconnections are shown in
Figure 4. The special PC mode is selected when IM# and SEL are connected to logic 0. The PC mode
interconnections are shown in Figure 5.
T
FIGURE 3. ST16C650A INTEL BUS INTERCONNECTIONS
BAUDO UT#
RCLK
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
VCC
VCC
CS0
CS1
PCM O DE#
IM #
A0
A0
A1
A1
A2
A2
TX
RX
IO R*
IO R#
DTR#
RTS#
CTS#
DSR#
CD#
RI#
IO W *
IO W #
CS#
INT
CS2#
INT
O P1#
O P2#
RESET
RESET
IO W
IO R
AS#
G ND
8
EXAR [ EXAR CORPORATION ]
