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ST16C650A
2.90V TO 5.5V UART WITH 32-BYTE FIFO
REV. 5.0.0
3.0 UART CONFIGURATION REGISTERS
The 650A has a set of configuration registers selected by address lines A0 to A2. The based page registers are
16C550 compatible with EXAR enhanced feature registers located on the second page (mirror) addresses.
The second page registers are only accessible by setting LCR register to a value of 0xBF. The register set is
shown on Table 7 and Table 8. .
TABLE 7: ST16C650A UART CONFIGURATION REGISTERS
ADDRESS
REGISTER
READ/WRITE
COMMENTS
A2 A1 A0
16550 COMPATIBLE REGISTERS
0
0 0
RHR - Receive Holding Register
THR - Transmit Holding Register
Read-only
Write-only
LCR[7] = 0
0
0
0
0 0
0 1
0 0
DLL - Divisor Latch Low
Read/Write
Read/Write
Read-only
≠
LCR[7] = 1, LCR 0xBF
DLM - Divisor Latch High
DREV - Device Revision Code
≠
LCR[7] = 1, LCR 0xBF
≠
LCR[7] = 1, LCR 0xBF,
DLL, DLM = 0x00
0
0 1
DVID - Device Identification Code
Read-only
≠
LCR[7] = 1, LCR 0xBF,
DLL, DLM = 0x00
0
0
0 1
1 0
IER - Interrupt Enable Register
Read/Write
LCR[7] = 0
ISR - Interrupt Status Register
FCR - FIFO Control Register
Read-only
Write-only
LCR[7] = 0
0
1
1
1 1
0 0
0 1
LCR - Line Control Register
MCR - Modem Control Register
LSR - Line Status Register
Read/Write
Read/Write
Read-only
Write-only
Read-only
Write-only
Read/Write
LCR[7] = 0
LCR[7] = 0
XFR - Extra Feature Register
MSR - Modem Status Register
IRPW - Infrared Pulse Width Register
SPR - Scratch Pad Register
LCR[7] = 0, EFR[4] = 1
LCR[7] = 0
1
1
1 0
1 1
LCR[7] = 0, EFR[4] = 1
LCR[7] = 0
ENHANCED REGISTERS
0
1
1
1
1
1 0
0 0
0 1
1 0
1 1
EFR - Enhanced Function Register
Xon-1 - Xon Character 1
Xon-2 - Xon Character 2
Xoff-1 - Xoff Character 1
Xoff-2 - Xoff Character 2
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
LCR = 0xBF
LCR = 0xBF
LCR = 0xBF
LCR = 0xBF
LCR = 0xBF
23
EXAR [ EXAR CORPORATION ]
