Document No.: FT_000288
FT232H SINGLE CHANNEL HI-SPEED USB TO MULTIPURPOSE UART/FIFO IC
Datasheet Version 1.8
Clearance No.: FTDI #199
4.5 FT245 Style Asynchronous FIFO Interface Mode Description
The FT232H can be configured as an asynchronous FIFO interface. This mode is similar to the
synchronous FIFO interface with the exception that the data is written to or read from the FIFO on the
falling edge of the WR# or RD# signals.
This mode does not provide a CLKOUT signal and it does not expect an OE# input signal. The following
diagrams illustrate the asynchronous FIFO mode timing.
Figure 4.5 FT245 Asynchronous FIFO Interface READ Signal Waveforms
Figure 4.6 FT245 Asynchronous FIFO Interface WRITE Signal Waveforms
Time
T1
Description
Min
1
Max
Units
RD# inactive to RXF#
14
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
T2
RXF# inactive after RD# cycle
RD# to DATA
49
1
T3
14
14
T4
RD# active pulse width
30
0
T5
RD# active after RXF#
T6
WR# active to TXE# inactive
TXE# active to TXE# after WR# cycle
DATA to WR# active setup time
DATA hold time after WR# inactive
WR# active pulse width
1
T7
49
5
T8
T9
5
T10
T11
30
0
WR# active after TXE#
Table 4.2 Asynchronous FIFO Timings (based on standard drive level outputs)
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