M32L1632512A
At MRS A9 =”1”
Read Burst =1, 2, 4, 8, full page/write Burst =1
BRSW
Special
MODE
At auto precharge of write, tRAS should not be violated.
8 Column Block Write. LSB A0-2 are ignored. Burst length =1
tRAS should not be violated.
Block Write
At auto precharge, tRAS should not be violated.
Random
MODE
tBDL =1, Valid DQ after burst stop is 1, 2 for CL=2, 3 respectively.
Using burst stop command, random mode it is possible only at full page burst
length.
Burst Stop
Before the end of burst, Row precharge command of the same bank stops read/write
burst with Row precharge.
RAS interrupt
(Interrupted by
Precharge)
tRDL =1 with DQM, valid DQ after burst stop is 1, 2 for CL = 2, 3 respectively
During read/write burst with auto precharge, RAS interrupt can not be issued.
Interrupt
MODE
Before the end of burst, new read/write stops read/write burst and starts new
read/write burst or block write.
CAS Interrupt
During read/write burst with auto precharge, CAS interrupt can not be issued.
14. Mask Function
1) Normal Write
I/O masking : By Mask at Write Per Bit Mode, the selected bit planes keep the original data.
If bit plane 0, 3, 7, 9, 19, 22, 24 and 31 keep the original value.
i) STEP
I SMRS(LMR) : Load mask [31-0]=”0111, 1110, 1011, 0111, 1111, 1101, 0111, 0110”
II Row Active with DSF “H” : Write Per Bit Mode Enable
III Perform Normal Write
i) ILLUSTRATION
I/O (=DQ)
External Data-in
DQMi
31
24
23
16
15
8
7
0
1 1 1 1 1 1 1 1
DQM3=0
1 1 1 1 1 1 1 1
DQM2=0
0 0 0 0 0 0 0 0
DQM1=0
0 0 0 0 0 0 0 0
DQM0=1
Mask Register
Before Write
After Write
0 1 1 1 1 1 1 0
0 0 0 0 0 0 0 0
0 1 1 1 1 1 1 0
1 0 1 1 0 1 1 1
0 0 0 0 0 0 0 0
1 0 1 1 0 1 1 1
1 1 1 1 1 1 0 1
1 1 1 1 1 1 1 1
0 0 0 0 0 0 1 0
0 1 1 1 0 1 1 0
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
Note 1
2) Block Write
Pixel masking : By Pixel Data issued through DQ pin, the selected pixels keep the original data.
See PIXEL TO DQ MAPPING TABLE.
If Pixel 0, 4, 9, 13, 18, 22, 27 and 31 keep the original white color.
Assume 8bpp
White = “0000, 0000”, Red = “1010, 0011”, Green = “1110, 0001”, Yellow = “0000, 1111”, Blue = “1100, 0011”
i) STEP
I SMRS(LCR) : Load color (for 8bpp, through x32 DQ color0-3 are loaded into color registers)
Load (color3, color2, color1, color0) = (Blue, Green, Yellow, Red)
= ”1100, 0011, 1110, 0001, 0000, 1111, 1010, 0011 ”
II Row Active with DSF “L” : I/O Mask by Write Per Bit Mode Disable
III Block write with DQ[31-0] = “0111, 0111, 1011, 1011, 1101, 1101, 1110, 1110”
* Note : 1. DQM byte masking.
Elite Semiconductor Memory Technology Inc.
Publication Date : Jun. 2001
Revision : 1.6 27/54
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
