M32L1632512A
FUNCTION TRUTH TABLE (TABLE 1, Continued)
Current
State
BA
(A10)
BA
BA
X
X
X
X
X
BA
BA
BA
X
X
X
DSF
ADDR
ACTION
Note
CS RAS CAS WE
L
L
L
L
H
L
L
L
L
L
L
H
L
L
L
L
L
L
H
L
L
L
H
H
H
L
X
H
H
L
L
H
L
X
H
H
L
H
L
X
L
RA
RA
X
X
X
ILLEGAL
2
3
Write
Term Burst : Precharge timing for Writes
ILLEGAL
H
X
X
H
L
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
ILLEGAL
X
H
H
H
H
L
NOP(Continue Burst to End Precharge)
NOP(Continue Burst to End Precharge)
ILLEGAL
X
X
Read with
Auto
Precharge
H
L
CA, AP ILLEGAL
CA, AP ILLEGAL
RA, PA ILLEGAL
2
2
X
X
X
H
L
H
L
X
X
X
L
X
X
X
X
ILLEGAL
2
X
H
H
H
H
L
NOP(Continue Burst to End Precharge)
NOP(Continue Burst to End Precharge)
ILLEGAL
Write with
Auto
Precharge
X
BA
BA
BA
X
CA, AP ILLEGAL
CA, AP ILLEGAL
RA, PA ILLEGAL
2
2
L
H
L
L
X
X
X
ILLEGAL
2
X
X
NOP Idle after tRP
NOP Idle after tRP
ILLEGAL
L
H
H
H
X
X
X
L
L
L
L
H
H
L
L
H
L
H
H
L
X
H
L
X
X
X
X
X
X
Precharging
BA
BA
BA
CA, AP ILLEGAL
RA
PA
2
2
2
ILLEGAL
NOP Idle after tRP
ILLEGAL
L
H
L
X
L
X
X
X
X
X
X
X
X
X
4
NOP Row Active after tBWC
NOP Row Active after tBWC
ILLEGAL
L
H
H
H
X
X
X
X
Block
Write
Recovering
L
L
L
L
L
H
H
H
L
L
L
X
H
L
H
H
L
L
X
H
L
X
X
X
X
X
X
X
X
X
BA
BA
BA
X
CA, AP ILLEGAL
2
2
2
2
RA
PA
X
ILLEGAL
Term Block Write : Precharge timing for Block Write
ILLEGAL
X
X
X
NOP Row Active after tRCD
NOP Row Active after tRCD
ILLEGAL
L
H
H
H
X
X
X
X
Row
Activating
L
L
L
L
L
H
H
H
L
L
L
X
H
L
H
H
L
L
X
H
L
X
X
X
X
X
X
X
X
X
BA
BA
BA
X
CA, AP ILLEGAL
2
2
2
2
RA
PA
X
ILLEGAL
ILLEGAL
ILLEGAL
X
X
X
NOP Idle after tRC
NOP Idle after tRC
ILLEGAL
L
H
H
X
X
X
X
Refreshing
L
L
L
H
L
L
L
H
L
X
X
X
X
X
X
X
X
X
X
X
X
ILLEGAL
ILLEGAL
ABBREVIATIONS :
RA = Row Address (A0~A9)
NOP = No Operation Command
BA = Bank Address (A10)
CA = Column Address (A0~A7)
PA = Precharge All (A9)
AP = Auto Precharge (A9)
Elite Semiconductor Memory Technology Inc.
Publication Date : Jun. 2001
Revision : 1.6 31/54
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
