M32L1632512A
Write Interrupted by Precharge Command & Write Burst Stop Cycle (@ Full Page Only)
12
11
13
14
15
1
2
3
4
7
8
9
10
16
17
18
19
5
6
0
C L O C K
H I G H
C K E
C S
R A S
C A S
RA a
C A b
A D D R
C A a
A10
A9
*N o t e 1
*N o t e 1
RA a
tR D L
tB D L
W E
D SF
D Q M
* N o t e 3
* N o t e 2
D Aa2 D Aa3 DAa4
D Ab0 DAb1 D Ab2
D Aa0 D Aa1
DAb3 DAb4 D Ab5
D Q
W r i te
(A - Ba n k )
W r i t e
(A - Ba n k )
Bu rs t Sto p
Pr ec ha rg e
( A- B an k )
R ow Ac t i ve
( A- B an k )
: D o n' t C a r e
*Note : 1. At full page mode, burst is warp-around at the end of burst. So auto precharge is impossible.
2. Data-in at the cycle of burst stop command cannot be written into the corresponding memory cell.
It is defined by AC parameter of BDL (=1CLK).
t
3. Data-in at the cycle interrupted by precharge cannot be written into the corresponding memory cell.
It is defined by AC parameter of RDL (=1CLK).
t
DQM at write interrupted by precharge command is needed to ensure RDL of 1CLK.
t
DQM should mask invalid input data on precharge command cycle when asserting precharge before end of burst.
Input data after Row precharge cycle will be masked internally.
4. Burst stop is valid only at full page burst length.
Elite Semiconductor Memory Technology Inc.
Publication Date : Jun. 2001
Revision : 1.6 47/54
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
