M32L1632512A
Single Bit Read-Write-Read Cycle (Same Page) @CAS Latency = 3, Burst Length = 1
tC H
4
11
12
13
15
17
19
1
2
3
9
10
14
16
18
0
6
8
5
7
C L O C K
C K E
tC L
tC C
H I G H
tR A S
tR C
* N ot e 1
tS H
tS S
C S
tR P
tR C D
tS H
tS S
R A S
tC C D
tS H
tS S
C A S
tS S
tS H
C c
R a
C a
C b
R b
A D D R
tS H
tS S
* N o t e 2, 3
BS
* N ot e 2
* N o t e 2 , 3
BS
* N o t e 2, 3 * N ot e 4
* N ot e 2
BS
BS
BS
BS
A10
A9
* N ot e 3
* N ot e 3
* N ot e 3 * N ot e 4
R a
R b
tS H
W E
D S F
tS S
* N o t e 6
* N ot e 5
* No t e 5
tS S
tS H
tS H
tS S
D Q M
tR A C
tS H
tS A C
tS L Z
Qa
D b
Qc
D Q
tS S
tO H
tS H Z
R o w A c t i v e
( W r i te per B i t
E n a bl e o r D i s abl e )
R ead
W r i t e
o r
Bl o c k W r i t e
R ead
R ow A c t i v e
(W r i te P er B i t
E na b le or D is a bl e)
Pr ec h a rg e
:D on ' t C a r e
Elite Semiconductor Memory Technology Inc.
Publication Date : Jun. 2001
Revision : 1.6 34/54
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
