ESMT
M14D5121632A (2H)
Operation Temperature Condition (TC) -40°C~95°C
Burst Read followed by Burst Write
< RL= 5; WL= (RL-1) = 4; BL= 4 >
Tn+1
T0
Tn-1
T1
Tn
Tn+2
Tn+3
Tn+4
Tn+5
CLK
CLK
Posted CAS
READ A
Posted CAS
WRITE A
CMD
NOP
NOP
NOP
NOP
NOP
NOP
NOP
t
RTW (Read to Write-turn around-time)
DQS,DQS
RL = 5
WL = RL-1 = 4
DQs
DoutA0 DoutA1
DoutA3
DinA0 DinA1
DinA3
DinA2
DoutA2
Note: The minimum time from the Burst Read command to the Burst Write command is defined by a read to
write-turn around-time(tRTW), which is 4 clocks in case of BL = 4 operation, 6 clocks in case of BL = 8
operation.
Seamless Burst Read
< RL= 5; AL= 2; CL= 3; BL = 4 >
T4
T0
T1
T2
T5
T6
T7
T8
T3
CLK
CLK
Posted CAS
READ B
Posted CAS
READ A
CMD
NOP
NOP
NOP
NOP
NOP
NOP
NOP
DQS,DQS
AL = 2
CL = 3
RL = 5
DQs
DoutB1
DoutA1
DoutA3 DoutB0
DoutA2
DoutB2
DoutA0
Note: The seamless burst read operation is supported by enabling a Read command at every other clock for BL =
4 operation, and every 4 clock for BL = 8 operation. This operation is allowed regardless of same or different
banks as long as the banks are activated.
Elite Semiconductor Memory Technology Inc.
Publication Date : Aug. 2011
Revision : 1.1 40/62
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
