ePVP6800
VFD Controller
0 0000 0001 0010
0 0000 0001 0011
0012
0013
RET
[Top of Stack] → PC
None
None
2
2
[Top of Stack] → PC
Enable Interrupt
RETI
0 0000 0001 0100
0 0000 0001 rrrr
0 0000 0010 0000
0 0000 01rr rrrr
0 0000 1000 0000
0 0000 11rr rrrr
0 0001 00rr rrrr
0 0001 01rr rrrr
0 0001 10rr rrrr
0 0001 11rr rrrr
0 0010 00rr rrrr
0 0010 01rr rrrr
0 0010 10rr rrrr
0 0010 11rr rrrr
0 0011 00rr rrrr
0 0011 01rr rrrr
0 0011 10rr rrrr
0 0011 11rr rrrr
0 0100 00rr rrrr
0 0100 01rr rrrr
0 0100 10rr rrrr
0 0100 11rr rrrr
0 0101 00rr rrrr
0 0101 01rr rrrr
0 0101 10rr rrrr
0 0101 11rr rrrr
0014
001r
0020
00rr
0080
00rr
01rr
01rr
01rr
01rr
02rr
02rr
02rr
02rr
03rr
03rr
03rr
03rr
04rr
04rr
04rr
04rr
05rr
05rr
05rr
05rr
CONTR
IOR R
CONT → A
IOCR → A
None
None
1
1
TBL
R2+A → R2 bits 9,10 do not clear Z,C,DC
2
MOV R,A
CLRA
A → R
None
1
0 → A
Z
1
CLR R
0 → R
Z
1
SUB A,R
SUB R,A
DECA R
DEC R
R-A → A
Z,C,DC
1
R-A → R
Z,C,DC
1
R-1 → A
Z
1
R-1 → R
Z
1
OR A,R
OR R,A
AND A,R
AND R,A
XOR A,R
XOR R,A
ADD A,R
ADD R,A
MOV A,R
MOV R,R
COMA R
COM R
INCA R
INC R
A ∨ R → A
A ∨ R → R
A & R → A
A & R → R
A ⊕ R → A
A ⊕ R → R
A + R → A
A + R → R
R → A
Z
1
Z
1
Z
1
Z
1
Z
1
Z
1
Z,C,DC
1
Z,C,DC
1
Z
1
R → R
Z
1
/R → A
Z
1
/R → R
Z
1
1
R+1 → A
R+1 → R
R-1 → A, skip if zero
R-1 → R, skip if zero
Z
Z
1
DJZA R
DJZ R
None
None
2 if skip
2 if skip
R(n) → A(n-1)
R(0) → C, C → A(7)
0 0110 00rr rrrr
0 0110 01rr rrrr
0 0110 10rr rrrr
0 0110 11rr rrrr
0 0111 00rr rrrr
06rr
06rr
06rr
06rr
07rr
RRCA R
RRC R
C
1
1
1
1
1
R(n) → R(n-1)
R(0) → C, C → R(7)
C
R(n) → A(n+1)
R(7) → C, C → A(0)
RLCA R
RLC R
C
R(n) → R(n+1)
R(7) → C, C → R(0)
C
R(0-3) → A(4-7)
R(4-7) → A(0-3)
SWAPA R
None
0 0111 01rr rrrr
0 0111 10rr rrrr
07rr
07rr
SWAP R
JZA R
R(0-3) ↔ R(4-7)
None
None
1
R+1 → A, skip if zero
2 if skip
This specification is subject to change without further notice.
11.28.2004 (V123) 29 of 47
ELAN [ ELAN MICROELECTRONICS CORP ]
