ePVP6800
VFD Controller
ꢁ The other registers’ (Bit 7 ~ Bit 0) default values are as follows
R Register R Register R Register R Register IOC Register IOC Register
Address
PAGE 0
00xxxxxx
0000xxxx
00000000
00000000
00000000
xxxx0000
00011xx0
xxxxxxxx
xxxxxxxx
xxxxx000
X0000000
00000000
PAGE 1
PAGE 2
PAGE 3
PAGE 0
PAGE 1
0x4
0x5
0x6
0x7
0x8
0x9
0xA
0xB
0xC
0xD
0xE
0xF
xxxx0000
00000000
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
00000000
00000000
xxxxxxxx
xxxxxxxx
00000000
00000000
00000000
00000000
00000000
x0000000
1111xxxx
11111111
x1111111
1111xxxx
xxxxx000
x000xxxx
00000000
7.7 Wake Up
The controller features two types of sleep mode for power saving:
7.7.1 SLEEP Mode, RA(6 ;7) = 0 + "SLEP" Instruction
Under this mode, the controller turns off all the CPU and crystal. However, other circuits with power
control like key tone control or PLL control (with register enabled), has to be turned off through
software.
7.7.2 IDLE mode, RA(6 ;7) = 1 + "SLEP" Instruction.
With this mode, the controller only turns the CPU off. The crystal remains running.
7.7.3 Wake-up from SLEEP Mode
1. WDT time out
2. External interrupt
3. /RESET pull low
Any of these cases will reset the controller and run the program from address zero. The status is just
like the power-on-reset condition. Be sure to enable circuit after cases 1 or 2 occurs.
This specification is subject to change without further notice.
11.28.2004 (V123) 27 of 47
ELAN [ ELAN MICROELECTRONICS CORP ]
