ePVP6800
VFD Controller
b0
b3 b4
b7
X X H
L
X X H
U
Lower 4 bits
Higher 4 bits
Only the lower 4 bits of the addresses assigned to SEG17 through SEG20 are valid and the higher 4
bits are ignored.
c) Display Memory Addresses:
Seg1
Seg4 Seg5
Seg8
00 HL
00 HU
DIG1
DIG2
DIG3
DIG4
DIG5
DIG6
DIG7
DIG8
DIG9
DIG10
DIG11
01 HL
02 HL
03 HL
04 HL
05 HL
07 HL
08 HL
09 HL
0A HL
0B HL
01 HU
02 HU
03 HU
04 HU
06 HU
07 HU
08 HU
09 HU
0A HU
0B HU
b) Key Scanning Data Buffers:
Fig. 7 4 x 4 Configuration Key Matrix
The key matrix is of 4 x 4 configuration is as shown in the above figure.
The data of each key is stored as illustrated below, and is read by a read command, starting from the
least significant bit.
This specification is subject to change without further notice.
11.28.2004 (V123) 31 of 47
ELAN [ ELAN MICROELECTRONICS CORP ]
