EM78P5840N/41N/42N
8-Bit Microcontrollers
7.2.5 R4 (RAM Selection for Common Registers R20 ~ R3F)
(RAM Selection Register)
Bit 7
RB1
Bit 6
RB0
Bit 5
RSR5
R/W
Bit 4
RSR4
R/W
Bit 3
RSR3
R/W
Bit 2
RSR2
R/W
Bit 1
RSR1
R/W
Bit 0
RSR0
R/W
R/W-0
R/W-0
Bit 0 ~ Bit 5 (RSR0 ~ RSR5): Indirect addressing for common Registers R20 ~ R3F
RSR bits are used to select up to 32 registers (R20 to R3F) in indirect
addressing mode.
Bit 6 ~ Bit 7 (RB0 ~ RB1): Bank selection bits for common Registers R20 ~ R3F
These selection bits are used to determine which bank is activated
among the 4 banks for the 32 registers (R20 to R3F).
Refer to Section 7.1.1 “R Page Register Configuration” for further details.
7.2.6 R5 (Program Page Selection, PWM Control)
Page 0 (Port 5 I/O Data Register, Program Page Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
-
-
-
-
-
-
-
-
0
0
PS1
PS0
R/W-0
R/W-0
R/W-0
R/W-0
Bit 0 ~ Bit 1 (PS0 ~ PS1): Program page selection bits
PS1
PS0
Program Memory Page (Address)
0
0
1
1
0
1
0
1
Page 0
Page 1
Page 2
Page 3
The PAGE instruction can be used to maintain the program page.
Bit 2 ~ Bit 3 (undefined): These two bits must be set to “0.” Otherwise, the MCU will
access an incorrect program code.
Bit 4 ~ Bit 7 (undefined): not used
Page 3 (PWMCON)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PWM2E
R/W-0
PWM1E
R/W-0
T2EN
T1EN
T2P1
T2P0
T1P1
T1P0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
Bit 0 ~ Bit 1 (T1P0 ~ T1P1): TMR1 clock prescaler option bits
T1P1
T1P0
Prescaler
0
0
1
1
0
1
0
1
1:2 (Default)
1:8
1:32
1:64
10 •
Product Specification (V1.0) 04.25.2006
(This specification is subject to change without further notice)