EM78P5840N/41N/42N
8-Bit Microcontrollers
Page 3 (DT1H: Most Significant Byte (Bit 0 ~ Bit 1) of PWM1 Duty Cycle)
Bit 7
0
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
0
Bit 2
0
Bit 1
PWM1[9] PWM1[8]
R/W-0 R/W-0
Bit 0
R-0
R-0
R-0
R-0
R-0
R-0
Bit 0 ~ Bit 1 (PWM1[8] ~ PWM1[9]): The Most Significant two bits of PWM1 Duty
Cycle
Bit 2 ~ Bit 7 (undefined): These bits are not used. However, these bits must be
cleared to “0” to avoid possible error.
7.2.9 R8 (PWM1 Period)
Page 3 (PRD1: PWM1 Period)
Bit 7
PRD1[7] PRD1[6] PRD1[5] PRD1[4] PRD1[3] PRD1[2] PRD1[1] PRD1[0]
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
The contents of this register is PWM1 time base period. The PWM1 frequency is the
inverse of the time base period.
7.2.10 R9 (Port 9 I/O Data, DT2L)
Page 0 (Port 9 I/O Data Register)
Bit 7
P97
Bit 6
P96
Bit 5
P95
Bit 4
P94
Bit 3
P93
Bit 2
P92
Bit 1
P91
Bit 0
P90
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit 0 ~ Bit 7 (P90 ~ P97): 8-bit Port 9 (0~7) I/O data register. The IOC register can be
used to set each bit either as input or output.
Page 3 (DT2L: Least Significant Byte (Bit 0 ~ Bit 7) of PWM2 Duty Cycle)
Bit 7
PWM2[7] PWM2[6] PWM2[5] PWM2[4] PWM2[3] PWM2[2] PWM2[1] PWM2[0]
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
A specified value keeps the PWM2 output to remain high until the it matches with the
value of TMR2.
Product Specification (V1.0) 04.25.2006
(This specification is subject to change without further notice)
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ELAN [ ELAN MICROELECTRONICS CORP ]
