EM78P350N
8-Bit Microprocessor with OTP ROM
Bit 0 (RBF): Read Buffer Full flag
0 : Receive is ongoing, SPIB is empty
1 : Receive is completed, SPIB is full
6.5.5 SPI Mode Timing
The edge of SCK is selected by programming bit CES. The waveform shown in Fig.
6-12 is applicable regardless of whether the EM78P350N is in master or slave mode
with /SS disabled. However, the waveform in Fig. 6-13 can only be implemented in
slave mode with /SS enabled.
Fig. 6-12 SPI Mode with /SS Disabled
Fig. 6-13 SPI Mode with /SS Enable
Product Specification (V 1.0) 09.14.2006
(This specification is subject to change without further notice)
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ELAN [ ELAN MICROELECTRONICS CORP ]
