EM78P350N
8-Bit Microprocessor with OTP ROM
6.6.3 Programming the Related Registers
The related registers of the defined TMR4 operation are shown in Table 4 and Table 5
Table 3 TMR4 Related Control Registers
Address
Name
SPIS/RC (Bank 0) DORD
SPIE SPIF TM4IE TM4IF
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
TD1 TD0 T4ROS OD3 OD4 RBF
“0” TM4E TM4P1 TM4P0
0x0C
NA
−
T4CR/IOC9
Table 4 Related Status/Data Registers ofTMR4
Address
Name
TMR4/R9 (Bank 0) TMR47 TMR46 TMR45 TMR44 TMR43 TMR42 TMR41 TMR40
SPIE SPIF TM4IF “0” TM4E TM4P1 TM4P0
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0x09
NA
T4CR/IOC9
−
TMR4: Timer 4 Register
TMR47~TMR40 are set of Timer 4 register bits which are incremented until the value
matches PWP and then resets to 0.
T4ROS (Bit 4): Timer 4 Read Buffer Select Bit
0 : Read Value from Timer 4 Preset Register
1 : Read Value from Timer 4 Counter Register
T4CR: Timer 4 Control Register
Bit 2 (TM4E): Timer4 enable bit
Bit 1 (TM4P1) and Bit 0 (TM4P): Timer 4 prescaler for FSCO
TM4P1
TM4P0
Prescaler Rate
0
0
1
1
0
1
0
1
1:1
1:4
1:8
1:16
Product Specification (V 1.0) 09.14.2006
(This specification is subject to change without further notice)
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ELAN [ ELAN MICROELECTRONICS CORP ]
