EM78P350N
8-Bit Microprocessor with OTP ROM
CLK (Fosc/2 or Fosc/4)
Data Bus
TCC (R1)
0
8-Bit Counter (IOCC1)
MUX
SYNC
2 cycles
TCC Pin
1
8 to 1 MUX
Prescaler
TE (CONT)
TCC overflow
Interrupt
TS (CONT)
PSR2~0
(CONT)
WDT
8-Bit counter
8 to 1 MUX
Prescaler
WDTE
(IOCE0)
PSW2~0
(IOCE0)
WDT Time out
Fig. 6-2 TCC and WDT Block Diagram
6.4 I/O Ports
The I/O registers (Port 5, Port 6, Port 7 and Port8) are bidirectional tri-state I/O ports.
The Pull-high and Pull-down functions can be set internally by IOCB0, IOCC0, and
IOCD0 respectively. Port 6 features an input status change interrupt (or wake-up)
function. Each I/O pin can be defined as "input" or "output" pin by the I/O control
registers (IOC50 ~ IOC80). The I/O registers and I/O control registers are both
readable and writable. The I/O interface circuits for Port 5, Port 6, and Port 7 are
illustrated in Figures 6-3, 6-4, & 6-5 respectively (see next page). Port 6 with Input
Change Interrupt/Wake-up is shown in Fig. 6-6.
34 •
Product Specification (V1.0) 09.14.2006
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
