EM78P257
OTP ROM
÷1
÷4
÷8
M F 0
M F 1
Fosc
High-Time
Register
L o w - T i m e
Register
Fosco
D P 0
D P 1
1:2
1:3
1:4
Duty:Period
Pulse Timer
H F
T C C B H
(MSB Counter)
I R O U T
H/W Modulator
T C C B L
(LSB Counter)
T C C B I F
1 : o v e r f l o w
L G P
P W M
I R E
<Note> In software design, Low-time and High-time registers cannot set “ 0” at initial state.
Fig. 27 Hardware Modulator
2. Function Description
The following describes the function of each block and single for Fig.27 which depicts how to complete IR kernel
(hardware modulator).
Low-time Register
High-time Register
The 8-bit Low-time register controls the active or Low period of the pulse.
The decimal value of its contents determines the number of oscillator cycles indicating
that the IR OUT pin is active. The active period of IR OUT can be calculated as follow:
tLow=(decimal value held in Low-time register)/fosco
The 8-bit High-time register control the inactive or High period of the pulse.
The decimal value of its contents determines the number of oscillator cycles indicating
that the IR OUT pin is active. The inactive period of IR OUT can be calculated as follow:
tHigh=(decimal value held in High-time register)/fosco
Pulse Timer
The contents of the Low-time and High-time Latch registers are loaded alternately into
the Pulse timer. When loaded, the Pulse timer contents are decremented by “ 1” every
oscillator cycle and upon reaching zero, the Pulse timer will be loaded with the contents
of the other register.
IR control register
Contains the bits that control various possibilities for the output pulse
This specification is subject to change without prior notice.
60
07.27.2004 (V1.4)
ELAN [ ELAN MICROELECTRONICS CORP ]
