EM78P257
OTP ROM
1: Enable IRE. Ignored RB(Bit4(TCCBTE); Bit5(TCCBTS)), and TCCBX set as decrement counter.
Enable H/W Modulator Function.
• Bit 2(HF) High Frequency. When HF = 1; the Low-time part of the generated pulse is modulated with
Frequency Fosco.
• Bit 1(LGP) Long Pulse. When LGP = 1; the contents of the High-time register are ignored. A single
pulse is generated. Its pulse is determined as shown below.
Pulse width = (Contents of Low-time register) x (number of pulse) x (1/Fosco)
If HF = 1; this pulse is modulated with Frequency Fosco (selected by M1,M0).
• Bit 0(PWM) Pulse Width Modulation. When PWM = 1 and LGP = 0, the LSB Counter & MSB Counter
are disabled, a continuous pulse train is generated, and the output signal is actually a PWM
waveform format of PWM.
5. IR mode timing
Fosc
Fosco
start
start
IR OUT
CASE 1
CASE 2
Software time
Interrupt to CPU
Low-time Register = 3
High-time Register = 2
Number of pulses = 2
IR OUT
Fig. 28 CASE 1shows a typical pulse train(DP=00;MF=10;HF=0;LGP=0;PWM=0); CASE 2 shows
the same pulse train after being modulated with a frequency of 1/4Fosc
(DP=00 ;MF=10 ;HF=1;LGP=0;PWM=0).
This specification is subject to change without prior notice.
64
07.27.2004 (V1.4)
ELAN [ ELAN MICROELECTRONICS CORP ]
