EM77950
BB Controller
11 Dual Pulse Width Modulations (PWM0 and PWM1)
11.1 Overview
The EM77950 has two built-in PWM outputs with 16-bit resolution. Fig.11-1 shows the
functional block diagram. APWM output has a period and a duty cycle, and it keeps the
output high. The baud rate of the PWM is the inverse of the period. Fig. 11-2 depicts
the relationships between a period and a duty cycle.
DT0L
DT0H
DT1H
DL1H
DT1L
DL1L
PWM1IF
PWM0IF
DL0H
DL0L
Set as
compare
match
Set as
compa
re
PWM1E
S_WMP1
match
PWM0E
Duty
Duty
S_PWM0
Compare
Circuit
Compare
Circuit
PWM1IE
PWM0IE
Q
R
S
PWM1
R
Q
PWM0
TMR0HB TMR0LB
TMR1HB TMR1LB
S
Set as
compare
match
Set as
compare
match
Period
Period
Compare
Circuit
Compare
Circuit
PRD0H
PRD0L
PRD1H
PRD1L
MUX
MUX
PWM1E
PWM0E
Fosc/2
Fosc/2
Fig. 11-1 The Functional Block Diagram of the Dual PWM
Period
Period
Period
Duty
Duty
Duty
DUTY = TMR
PRD= TMR
Fig. 11-2 PWM Output Timing Diagram
Product Specification (V1.0) 10.09.2007
(This specification is subject to change without further notice)
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