EM77950
BB Controller
In EM77950, individual interrupt sources have their own interrupt vectors, depicted in
the following table:
Mnemonic
Mask
Status
No
Priority Vector
Function
Mask
Status
Register Bit Register Bit
KWUAE
KWUBE
KWUAIF
KWUBIF
0x82 3~0 0x12 3~0
1
2
1
1
0x10 Key Wake up
0x83
All
013
All
EINT0E
EINT1E
EINT0F
EINT1F
2
3
2
3
0x18 External Interrupt 0x81
0x11
3
4
FRCOE
TCCOE
FRCOF
TCCOF
1
1
0x20 FRC Overflow
0x28 TCC Overflow
0x81
0x81
0
1
0x11
0x11
0
1
Read Buffer Full
of SPI
5
6
RBFIE
ADCIE
RBFIF
ADCIF
1
1
0x30
0x81
0x80
6
4
0x11
0x11
6
7
0x38 ADC complete
PWM0IE
PWM1IE
PWM0IF
PWM1IF
4
5
4
5
PWM period
0x40
7
1
0x81
0x11
complete
Carrier sense
0x48
8
9
CSDE
CSDF
2
2
2
0x99
0x99
7
6
5
0x30
0x30
0x30
7
6
5
interrupt
TX FIFO almost
empty
TX_AEE
TX_AEF
RX_AFF
0x50
RX FIFO almost
10 RX_AFE
0x58
full
0x99
0x99
11 TX_EMPTY TX_EMPTYF
2
2
0x60 TX FIFO empty
4
3
0x30
0x30
4
3
12 RX_OFE
13 LINK_DIS
RX_OFF
0x68 RX FIFO overflow 0x99
LINK_DIS
LINK_DIS
2
0x70
0x99
2
0x30
2
interrupt
0x78 Lock out interrupt 0x99
0x80 Lock in interrupt 0x99
14 LOCK_OUTE LOCK_OUTF
15 LOCK_INE LOCK_INF
2
2
1
0
0x30
0x30
1
0
The interrupt priority is another useful feature provided by this IC. The latest interrupt,
which has the highest priority than the others, will override and hold the currently
executed interrupt until the interrupt is finished. Otherwise, the latest interrupt will be in
queue right after all its peers.
Global INT
Enable
Function INT
Function INT
Function INT
Vector Address
Enable
Condition Happened
Function
Enable
Function INT
Flag
Fig. 12 Block Diagram of Interrupts
Product Specification (V1.0) 10.09.2007
(This specification is subject to change without further notice)
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