EDE1108AFBG
DC Characteristics 1 (TC = 0°C to +85°C, VDD, VDDQ = 1.8V ± 0.1V)
max.
× 8
Parameter
Symbol
IDD0
Grade
Unit
mA
Test condition
one bank; tCK = tCK (IDD), tRC = tRC (IDD),
tRAS = tRAS min.(IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
Operating current
(ACT-PRE)
-8E, -8G 85
-6E 80
one bank; IOUT = 0mA;
BL = 4, CL = CL(IDD), AL = 0;
tCK = tCK (IDD), tRC = tRC (IDD),
tRAS = tRAS min.(IDD); tRCD = tRCD (IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data pattern is same as IDD4W
Operating current
(ACT-READ-PRE)
-8E, -8G 100
-6E 95
IDD1
mA
all banks idle;
tCK = tCK (IDD);
CKE is L;
Other control and address bus inputs are STABLE;
Data bus inputs are FLOATING
Precharge power-down
standby current
-8E, -8G 10
-6E 10
IDD2P
IDD2Q
IDD2N
mA
mA
mA
all banks idle;
tCK = tCK (IDD);
CKE is H, /CS is H;
Other control and address bus inputs are STABLE;
Data bus inputs are FLOATING
Precharge quiet standby
current
-8E, -8G 35
-6E 30
all banks idle;
tCK = tCK (IDD);
CKE is H, /CS is H;
Other control and address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
-8E, -8G 40
-6E 35
Idle standby current
all banks open;
tCK = tCK (IDD);
CKE is L;
Other control and
address bus inputs
are STABLE;
Data bus inputs are
FLOATING
-8E, -8G 35
Fast PDN Exit
MRS (12) = 0
IDD3P-F
IDD3P-S
mA
mA
-6E
35
Active power-down
standby current
-8E, -8G 20
-6E 20
Slow PDN Exit
MRS (12) = 1
all banks open;
tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD);
CKE is H, /CS is H between valid commands;
Other control and address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
-8E, -8G 90
-6E 80
Active standby current
IDD3N
IDD4R
mA
mA
all banks open, continuous burst reads, IOUT = 0mA;
BL = 4, CL = CL(IDD), AL = 0;
tCK = tCK (IDD), tRAS = tRAS max.(IDD),
tRP = tRP (IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data pattern is same as IDD4W
Operating current
(Burst read operating)
-8E, -8G 160
-6E 140
all banks open, continuous burst writes;
BL = 4, CL = CL(IDD), AL = 0;
tCK = tCK (IDD), tRAS = tRAS max.(IDD),
tRP = tRP (IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
Operating current
(Burst write operating)
-8E, -8G 160
-6E 140
IDD4W
mA
Preliminary Data Sheet E1430E20 (Ver. 2.0)
8
ELPIDA [ ELPIDA MEMORY ]
