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DEI1184-SMS 参数 Datasheet PDF下载

DEI1184-SMS图片预览
型号: DEI1184-SMS
PDF下载: 下载PDF文件 查看货源
内容描述: [8CH PROGRAMMABLE DISCRETE INTERFACE W/ EXT HV PROTECTION]
分类和应用: 光电二极管接口集成电路
文件页数/大小: 14 页 / 786 K
品牌: DEIAZ [ Device Engineering Incorporated ]
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APPLICATION INFORMATION  
Discrete Input Filtering  
The DEI1184 Analog Front End provides a moderate level of noise immunity via a combination hysteresis and limited bandwidth.  
The Hysteresis is 3 V minimum and the comparator bandwidth is approximately 10 MHZ.  
Many applications provide additional noise immunity by means of debounce/filtering in software or in digital circuitry (i.e.:  
FPGA). Common input debounce techniques are readily found with a web search of the term “software debounce” and range  
from simple detectors of two or more sequential stable readings to FIR filters emulating RC time constants.  
Input Current Characteristics  
The DIN Input Current vs. Voltage characteristics for the 28V/OPEN Mode and GND/OPEN Mode are shown in Figure 12 and  
Figure 13.  
Discrete Input Characteristics (28V/OPEN)  
2.50  
2.00  
1.50  
1.00  
0.50  
0.00  
-0.50  
-1.00  
-10.00  
0.00  
10.00  
20.00  
30.00  
40.00  
50.00  
Discrete Input Voltage (V)  
Figure 12 28V/Open Mode Input IV Characteristics (VDD=15 V)  
Discrete Input Characteristics (GND/OPEN)  
1.0  
0.5  
0.0  
-0.5  
-1.0  
-1.5  
-2.0  
-2.5  
-10.0  
0.0  
10.0  
20.0  
30.0  
40.0  
50.0  
Discrete Input Voltage (V)  
Figure 13 GND/OPEN Mode Input IV Characteristics (VDD=15 V)  
©2018 Device Engineering Inc.  
11 of 14  
DS-MW-01184-01 Rev. E  
06/25/2018  
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