欢迎访问ic37.com |
会员登录 免费注册
发布采购

DR80390XP 参数 Datasheet PDF下载

DR80390XP图片预览
型号: DR80390XP
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能的可配置的8位微控制器版本3.10 [High Performance Configurable 8-bit Microcontroller ver 3.10]
分类和应用: 微控制器
文件页数/大小: 11 页 / 135 K
品牌: DCD [ DIGITAL CORE DESIGN ]
 浏览型号DR80390XP的Datasheet PDF文件第1页浏览型号DR80390XP的Datasheet PDF文件第2页浏览型号DR80390XP的Datasheet PDF文件第4页浏览型号DR80390XP的Datasheet PDF文件第5页浏览型号DR80390XP的Datasheet PDF文件第6页浏览型号DR80390XP的Datasheet PDF文件第7页浏览型号DR80390XP的Datasheet PDF文件第8页浏览型号DR80390XP的Datasheet PDF文件第9页  
16-bit Compare/Capture Unit  
Events capturing  
- Harward  
Memory style  
- von Neumann  
Pulses generation  
- synchronous  
- asynchronous  
Digital signals generation  
Gated timers  
Program Memory type  
Program Memory wait-  
states  
- used (0-7)  
- unused  
Sophisticated comparator  
Pulse width modulation  
Pulse width measuring  
Fixed-Point arithmetic coprocessor  
Multiplication - 16bit * 16bit  
Division - 32bit / 16bit  
Division - 16bit / 16bit  
Left and right shifting - 1 to 31 bits  
Normalization  
- used  
Program Memory writes  
- unused  
- synchronous  
- asynchronous  
Internal Data Memory type  
External Data Memory  
wait-states  
- used (0-7)  
- unused  
Second Data Pointer  
(DPTR1)  
- used  
- unused  
- used  
Data Pointers decrement  
Data Pointers auto-switch  
Interrupts  
- unused  
Floating-Point arithmetic coprocessor IEEE-  
- used  
754 standard single precision  
- unused  
FADD, FSUB - addition, subtraction  
FMUL, FDIV- multiplication, division  
FSQRT- square root  
subroutines  
-
location  
- used  
Timing access protection  
Power Management Mode  
Stop mode  
- unused  
FUCOM - compare  
- used  
FCHS - change sign  
- unused  
FABS - absolute value  
- used  
Floating-Point math coprocessor - IEEE-754  
standard single precision real, word and  
short integers  
- unused  
- used  
DoCDdebug unit  
- unused  
FADD, FSUB- addition, subtraction  
FMUL, FDIV- multiplication, division  
FSQRT- square root  
Besides mentioned above parameters all  
available peripherals and external interrupts  
can be excluded from the core by changing  
appropriate constants in package file.  
FUCOM- compare  
FCHS - change sign  
FABS - absolute value  
D E L I V E R A B L E S  
Source code:  
FSIN, FCOS- sine, cosine  
FTAN, FATAN- tangent, arcs tangent  
VHDL Source Code or/and  
VERILOG Source Code or/and  
Encrypted, or plain text EDIF netlist  
VHDL & VERILOG test bench environment  
Active-HDL automatic simulation macros  
ModelSim automatic simulation macros  
Tests with reference responses  
Technical documentation  
C O N F I G U R A T I O N  
The following parameters of the DR80390XP  
core can be easy adjusted to requirements of  
dedicated application and technology. Configu-  
ration of the core can be prepared by effortless  
changing appropriate constants in package file.  
There is no need to change any parts of the  
code.  
Installation notes  
HDL core specification  
Datasheet  
All trademarks mentioned in this document  
are trademarks of their respective owners.  
http://www.DigitalCoreDesign.com  
http://www.dcd.pl  
Copyright 1999-2003 DCD – Digital Core Design. All Rights Reserved.