Interrupt Controller – Interrupt control module
is responsible for the interrupt manage system
for the external and internal interrupt sources.
It contains interrupt related registers such as
Interrupt Enable (IE), Interrupt Priority (IP),
Extended Interrupt Enable (EIE), Extended
Interrupt priority (EIP) and (TCON) registers.
I/O Ports – Block contains 8051’s general pur-
pose I/O ports. Each of port’s pin can be
read/write as a single bit or as an 8-bit bus
called P0, P1, P2, P3.
sign. Basing on specialized CORDIC algorithm
a full set of trigonometric operations are also
allowed: sine, cosine, tangent, arctangent. It
also has built-in integer to floating point and
vice versa conversion instructions. FPU sup-
ports single precision real numbers, 16-bit and
32-bit signed integers. This unit has included
standard software interface allows easy usage
and interfacing with user C/ASM written pro-
grams.
Multiply Divide Unit – It’s a fixed point fast
16-bit and 32-bit multiplication and division
unit. It provides shift and normalize operations,
additionally. All operations are performed using
unsigned integer numbers. The MDU contains
MD0 to MD5 operands, the result registers and
one control register called ARCON. This unit
has included standard software interface al-
lows easy usage and interfacing with user
C/ASM written programs.
Timers – System timers module. Contains two
16 bits configurable timers: Timer 0 (TH0,
TL0), Timer 1 (TH1, TL1) and Timers Mode
(TMOD) registers. In the timer mode, timer
registers are incremented every 12 CLK peri-
ods when appropriate timer is enabled. In the
counter mode the timer registers are incre-
mented every falling transition on their corre-
sponding input pins (T0, T1), if gates are
opened (GATE0, GATE1). T0, T1 input pins
are sampled every CLK period. It can be used
as clock source for UARTs.
Timer 2 – Second system timer module con-
tains one 16-bit configurable timer: Timer 2
(TH2, TL2), capture registers (RLDH, RLDL)
and Timer 2 Mode (T2MOD) register. It can
work as a 16-bit timer / counter, 16-bit auto-
reload timer / counter. It also supports com-
pare capture unit if it’s presented in system. It
can be used as clock source for UART0.
Power Management Unit – Block contains
advanced power saving mechanisms with
switchback feature, allowing external clock
control logic to stop clocking (Stop mode) or
run core in lower clock frequency (Power Man-
agement Mode) to significantly reduce power
consumption. Switchback feature allows
UARTs, and interrupts to be processed in full
speed mode if enabled. It is very desired when
microcontroller is planned to use in portable
and power critical applications.
DoCD™ Debug Unit – it’s a real-time hard-
ware debugger provides debugging capability
of a whole SoC system. In contrast to other on-
chip debuggers DoCD™ provides non-intrusive
debugging of running application. It can halt,
run, step into or skip an instruction, read/write
any contents of microcontroller including all
registers, internal, external, program memo-
ries, all SFRs including user defined peripher-
als. Hardware breakpoints can be set and con-
trolled on program memory, internal and exter-
nal data memories, as well as on SFRs. Hard-
ware breakpoint is executed if any write/read
occurred at particular address with certain data
pattern or without pattern. The DoCD™ system
includes three-wire interface and complete set
of tools to communicate and work with core in
real time debugging. It is built as scalable unit
and some features can be turned off to save
silicon and reduce power consumption. A spe-
cial care on power consumption has been
taken, and when debugger is not used it is
automatically switched in power save mode.
Finally whole debugger is turned off when de-
bug option is no longer used.
Compare Capture Unit – The compare / cap-
ture / reload unit is one of the most powerful
peripheral units of the core. It can be used for
all kinds of digital signal generation and event
capturing such as pulse generation, pulse
width modulation, measurements etc.
Watchdog Timer – The watchdog timer is a
27-bit counter which is incremented every sys-
tem clock periods (CLK pin). It performs sys-
tem protection against software upsets.
Floating Point Unit – Block contains floating
point arithmetic IEEE-754 compliant instruc-
tions (C float, int, long int types supported). It
is used to execute single precision floating
point operations such as: addition, subtraction,
multiplication, division, square root, compari-
son absolute value of number and change of
UART0 – Universal Asynchronous Receiver &
Transmitter module is full duplex, meaning it
can transmit and receive concurrently. Includes
All trademarks mentioned in this document
are trademarks of their respective owners.
http://www.DigitalCoreDesign.com
http://www.dcd.pl
Copyright 1999-2003 DCD – Digital Core Design. All Rights Reserved.
DCD [ DIGITAL CORE DESIGN ]
