DM9010BI
Industrial-temperature Single Chip Ethernet Controller with General Processor Interface
4.13
RF
0, RW
Remote Fault
1 = Local device senses a fault condition
0 = No fault detected
4.12-4.11
4.10
Reserved
FCS
X, RW
0, RW
Reserved
Write as 0, ignore on read
Flow Control Support
1 = Controller chip supports flow control ability
0 = Controller chip doesn’t support flow control ability
100BASE-T4 Support
4.9
T4
0, RO/P
1 = 100BASE-T4 is supported by the local device
0 = 100BASE-T4 is not supported
The DM9010BI does not support 100BASE-T4 so this bit is
permanently set to 0
4.8
4.7
TX_FDX
TX_HDX
10_FDX
10_HDX
Selector
1, RW
1, RW
1, RW
1, RW
100BASE-TX Full Duplex Support
1 = 100BASE-TX full duplex is supported by the local device
0 = 100BASE-TX full duplex is not supported
100BASE-TX Support
1 = 100BASE-TX half duplex is supported by the local device
0 = 100BASE-TX half duplex is not supported
10BASE-T Full Duplex Support
1 = 10BASE-T full duplex is supported by the local device
0 = 10BASE-T full duplex is not supported
10BASE-T Support
1 = 10BASE-T half duplex is supported by the local device
0 = 10BASE-T half duplex is not supported
4.6
4.5
4.4-4.0
<00001>, RW Protocol Selection Bits
These bits contain the binary encoded protocol selector supported
by this node
<00001> indicates that this device supports IEEE 802.3 CSMA/CD
8.6 Auto-negotiation Link Partner Ability Register (ANLPAR) – 05
This register contains the advertised abilities of the link partner when received during Auto-negotiation.
Bit
Bit Name
Default
Description
5.15
NP
0, RO
Next Page Indication
0 = Link partner, no next page available
1 = Link partner, next page available
Acknowledge
5.14
ACK
0, RO
1 = Link partner ability data reception acknowledged
0 = Not acknowledged
The DM9010BI's auto-negotiation state machine will automatically
control this bit from the incoming FLP bursts. Software should not
attempt to write to this bit
5.13
RF
0, RO
Remote Fault
1 = Remote fault indicated by link partner
0 = No remote fault indicated by link partner
Reserved
Read as 0, ignore on write
Flow Control Support
5.12-5.11
5.10
Reserved
FCS
0, RO
0, RO
1 = Controller chip supports flow control ability by link partner
0 = Controller chip doesn’t support flow control ability by link
partner
Preliminary
34
Version: DM9010BI--DS-P01
January 12, 2010
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
