DM9010BI
Industrial-temperature Single Chip Ethernet Controller with General Processor Interface
8.1 Basic Mode Control Register (BMCR) - 00
Bit
Bit Name
Default
Description
0.15
Reset
0, RW/SC Reset
1=Software reset
0=Normal operation
This bit sets the status and controls the PHY registers to their default
states. This bit, which is self-clearing, will keep returning a value of
one until the reset process is completed
Loopback
Loop-back control register
1 = Loop-back enabled
0.14
0.13
Loopback
0, RW
1, RW
0 = Normal operation
When in 100Mbps operation mode, setting this bit may cause the
descrambler to lose synchronization and produce a 720ms "dead
time" before any valid data appears at the MII receive outputs
Speed Select
Speed selection
1 = 100Mbps
0 = 10Mbps
Link speed may be selected either by this bit or by auto-negotiation.
When auto-negotiation is enabled and bit 12 is set, this bit will return
auto-negotiation selected medium type
Auto-negotiation Enable
1 = Auto-negotiation is enabled, bit 8 and 13 will be in
auto-negotiation status
0.12
0.11
Auto-negotiation
enable
1, RW
0, RW
Power down
Power Down
While in the power-down state, the PHY should respond to
management transactions. During the transition to power-down state
and while in the power-down state, the PHY should not generate
spurious signals on the MII
1=Power down
0=Normal operation
0.10
0.9
Isolate
0,RW
Isolate
Force to 0 in application.
Restart
Auto-negotiation
0,RW/SC Restart Auto-negotiation
1 = Restart auto-negotiation. Re-initiates the auto-negotiation
process. When auto-negotiation is disabled (bit 12 of this register
cleared), this bit has no function and it should be cleared. This bit is
self-clearing and it will keep returning to a value of 1 until
auto-negotiation is initiated by the DM9010BI. The operation of the
auto-negotiation process will not be affected by the management
entity that clears this bit
0 = Normal operation
0.8
Duplex mode
Collision test
1,RW
0,RW
Duplex Mode
1 = Full duplex operation. Duplex selection is allowed when
Auto-negotiation is disabled (bit 12 of this register is cleared). With
auto-negotiation enabled, this bit reflects the duplex capability
selected by auto-negotiation
0 = Normal operation
Collision Test
0.7
1 = Collision test enabled. When set, this bit will cause the COL
signal to be asserted in response to the assertion of TX_EN in
Preliminary
31
Version: DM9010BI--DS-P01
January 12, 2010
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
